Re: [PATCH] OMAP: ctrl: Fix CONTROL_DSIPHY register fields

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+ Benoit

On 7/27/2011 11:50 AM, Archit Taneja wrote:
Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The Latest
TRM mentions the correct fields in the register.
You can mention the TRM version instead of 'latest'
Latest is very much relative :)


Signed-off-by: Archit Taneja<archit@xxxxxx>
Change looks good to me.
Autogen scripts needs to be checked as well.

---
  .../include/mach/ctrl_module_pad_core_44xx.h       |    8 ++++----
  1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
index c88420d..8321add 100644
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
@@ -941,10 +941,10 @@
  #define OMAP4_DSI2_LANEENABLE_MASK				(0x7<<  29)
  #define OMAP4_DSI1_LANEENABLE_SHIFT				24
  #define OMAP4_DSI1_LANEENABLE_MASK				(0x1f<<  24)
-#define OMAP4_DSI1_PIPD_SHIFT					19
-#define OMAP4_DSI1_PIPD_MASK					(0x1f<<  19)
-#define OMAP4_DSI2_PIPD_SHIFT					14
-#define OMAP4_DSI2_PIPD_MASK					(0x1f<<  14)
+#define OMAP4_DSI1_PIPD_SHIFT					14
+#define OMAP4_DSI1_PIPD_MASK					(0x1f<<  14)
+#define OMAP4_DSI2_PIPD_SHIFT					19
+#define OMAP4_DSI2_PIPD_MASK					(0x1f<<  19)

  /* CONTROL_MCBSPLP */
  #define OMAP4_ALBCTRLRX_FSX_SHIFT				31

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