Tarun Kanti DebBarma <tarun.kanti@xxxxxx> writes: > From: Charulatha V <charu@xxxxxx> > > By adding level and edge detection register offsets and then initializing them > correctly according to OMAP versions during device registrations we can now remove > lot of revision checks in these functions. > > Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@xxxxxx> > Signed-off-by: Charulatha V <charu@xxxxxx> Found the bug causing GPIO IRQ triggering failures for Blaze and Zoom3 GPIO-based network IRQs... > @@ -400,12 +394,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) > if (type & ~IRQ_TYPE_SENSE_MASK) > return -EINVAL; > > - /* OMAP1 allows only only edge triggering */ > - if (!cpu_class_is_omap2() > - && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) > + bank = irq_data_get_irq_chip_data(d); > + > + if (bank->regs->leveldetect0 && (type & > + (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) This check is not the same as the one it replaced. This check should be: if (!bank->regs->leveldetect0 && (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))) return -EINVAL; Note the formatting changes also for readability, but the bugfix is just adding the '!' before regs->leveldetect0. Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
