In OMAP PRCM terminology, the clock domain is defined as a group of IPs
that share some clocks and most of the time an interface clock.
Every IP does belong to a clockdomain.
For the moment the clock domain attribute is affected to a clock node.
The issue with that approach, is that a clock might or not belong to a
clock domain. Moreover during module transition, it is up to a module
to handle properly the clock domain state and not to a clock node.
Create a clkdm_name attribute to provide this information per hwmod.
Future cleanup series with remove that information from the OMAP4 clock
when it is relevant.
Signed-off-by: Benoit Cousson <b-cousson@xxxxxx>
Cc: Paul Walmsley <paul@xxxxxxxxx>
Cc: Rajendra Nayak <rnayak@xxxxxx>
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 82 ++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 +
2 files changed, 83 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index c531611..63ba19f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -120,6 +120,7 @@ static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
static struct omap_hwmod omap44xx_dmm_hwmod = {
.name = "dmm",
.class = &omap44xx_dmm_hwmod_class,
+ .clkdm_name = "l3_emif_clkdm",
.slaves = omap44xx_dmm_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
.mpu_irqs = omap44xx_dmm_irqs,
@@ -171,6 +172,7 @@ static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = {
static struct omap_hwmod omap44xx_emif_fw_hwmod = {
.name = "emif_fw",
.class = &omap44xx_emif_fw_hwmod_class,
+ .clkdm_name = "l3_emif_clkdm",
.slaves = omap44xx_emif_fw_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -210,6 +212,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {
static struct omap_hwmod omap44xx_l3_instr_hwmod = {
.name = "l3_instr",
.class = &omap44xx_l3_hwmod_class,
+ .clkdm_name = "l3_instr_clkdm",
.slaves = omap44xx_l3_instr_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -301,6 +304,7 @@ static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = {
static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
.name = "l3_main_1",
.class = &omap44xx_l3_hwmod_class,
+ .clkdm_name = "l3_1_clkdm",
.slaves = omap44xx_l3_main_1_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
.mpu_irqs = omap44xx_l3_main_1_irqs,
@@ -398,6 +402,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
.name = "l3_main_2",
.class = &omap44xx_l3_hwmod_class,
+ .clkdm_name = "l3_2_clkdm",
.slaves = omap44xx_l3_main_2_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -448,6 +453,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = {
static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
.name = "l3_main_3",
.class = &omap44xx_l3_hwmod_class,
+ .clkdm_name = "l3_instr_clkdm",
.slaves = omap44xx_l3_main_3_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -505,6 +511,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {
static struct omap_hwmod omap44xx_l4_abe_hwmod = {
.name = "l4_abe",
.class = &omap44xx_l4_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.slaves = omap44xx_l4_abe_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -527,6 +534,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = {
static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
.name = "l4_cfg",
.class = &omap44xx_l4_hwmod_class,
+ .clkdm_name = "l4_cfg_clkdm",
.slaves = omap44xx_l4_cfg_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -549,6 +557,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = {
static struct omap_hwmod omap44xx_l4_per_hwmod = {
.name = "l4_per",
.class = &omap44xx_l4_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.slaves = omap44xx_l4_per_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -571,6 +580,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = {
static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
.name = "l4_wkup",
.class = &omap44xx_l4_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
.slaves = omap44xx_l4_wkup_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -601,6 +611,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {
static struct omap_hwmod omap44xx_mpu_private_hwmod = {
.name = "mpu_private",
.class = &omap44xx_mpu_bus_hwmod_class,
+ .clkdm_name = "mpu_clkdm",
.slaves = omap44xx_mpu_private_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP44XX),
@@ -737,6 +748,7 @@ static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = {
static struct omap_hwmod omap44xx_aess_hwmod = {
.name = "aess",
.class = &omap44xx_aess_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_aess_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs),
.sdma_reqs = omap44xx_aess_sdma_reqs,
@@ -771,6 +783,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {
static struct omap_hwmod omap44xx_bandgap_hwmod = {
.name = "bandgap",
.class = &omap44xx_bandgap_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
.prcm = {
.omap4 = {
.clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL,
@@ -828,6 +841,7 @@ static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {
static struct omap_hwmod omap44xx_counter_32k_hwmod = {
.name = "counter_32k",
.class = &omap44xx_counter_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
.flags = HWMOD_SWSUP_SIDLE,
.main_clk = "sys_32k_ck",
.prcm = {
@@ -910,6 +924,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {
static struct omap_hwmod omap44xx_dma_system_hwmod = {
.name = "dma_system",
.class = &omap44xx_dma_hwmod_class,
+ .clkdm_name = "l3_dma_clkdm",
.mpu_irqs = omap44xx_dma_system_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs),
.main_clk = "l3_div_ck",
@@ -1001,6 +1016,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = {
static struct omap_hwmod omap44xx_dmic_hwmod = {
.name = "dmic",
.class = &omap44xx_dmic_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_dmic_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs),
.sdma_reqs = omap44xx_dmic_sdma_reqs,
@@ -1069,6 +1085,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = {
static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
.name = "dsp_c0",
.class = &omap44xx_dsp_hwmod_class,
+ .clkdm_name = "tesla_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.rst_lines = omap44xx_dsp_c0_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets),
@@ -1083,6 +1100,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
static struct omap_hwmod omap44xx_dsp_hwmod = {
.name = "dsp",
.class = &omap44xx_dsp_hwmod_class,
+ .clkdm_name = "tesla_clkdm",
.mpu_irqs = omap44xx_dsp_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs),
.rst_lines = omap44xx_dsp_resets,
@@ -1175,6 +1193,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
static struct omap_hwmod omap44xx_dss_hwmod = {
.name = "dss_core",
.class = &omap44xx_dss_hwmod_class,
+ .clkdm_name = "l3_dss_clkdm",
.main_clk = "dss_fck",
.prcm = {
.omap4 = {
@@ -1268,6 +1287,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
.name = "dss_dispc",
.class = &omap44xx_dispc_hwmod_class,
+ .clkdm_name = "l3_dss_clkdm",
.mpu_irqs = omap44xx_dss_dispc_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs),
.sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
@@ -1359,6 +1379,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {
static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
.name = "dss_dsi1",
.class = &omap44xx_dsi_hwmod_class,
+ .clkdm_name = "l3_dss_clkdm",
.mpu_irqs = omap44xx_dss_dsi1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
.sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
@@ -1429,6 +1450,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {
static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
.name = "dss_dsi2",
.class = &omap44xx_dsi_hwmod_class,
+ .clkdm_name = "l3_dss_clkdm",
.mpu_irqs = omap44xx_dss_dsi2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs),
.sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
@@ -1519,6 +1541,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {
static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
.name = "dss_hdmi",
.class = &omap44xx_hdmi_hwmod_class,
+ .clkdm_name = "l3_dss_clkdm",
.mpu_irqs = omap44xx_dss_hdmi_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs),
.sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
@@ -1605,6 +1628,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {
static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
.name = "dss_rfbi",
.class = &omap44xx_rfbi_hwmod_class,
+ .clkdm_name = "l3_dss_clkdm",
.sdma_reqs = omap44xx_dss_rfbi_sdma_reqs,
.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs),
.main_clk = "dss_fck",
@@ -1674,6 +1698,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
static struct omap_hwmod omap44xx_dss_venc_hwmod = {
.name = "dss_venc",
.class = &omap44xx_venc_hwmod_class,
+ .clkdm_name = "l3_dss_clkdm",
.main_clk = "dss_fck",
.prcm = {
.omap4 = {
@@ -1750,6 +1775,7 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
static struct omap_hwmod omap44xx_gpio1_hwmod = {
.name = "gpio1",
.class = &omap44xx_gpio_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
.mpu_irqs = omap44xx_gpio1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs),
.main_clk = "gpio1_ick",
@@ -1802,6 +1828,7 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
static struct omap_hwmod omap44xx_gpio2_hwmod = {
.name = "gpio2",
.class = &omap44xx_gpio_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap44xx_gpio2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs),
@@ -1855,6 +1882,7 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
static struct omap_hwmod omap44xx_gpio3_hwmod = {
.name = "gpio3",
.class = &omap44xx_gpio_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap44xx_gpio3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs),
@@ -1908,6 +1936,7 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
static struct omap_hwmod omap44xx_gpio4_hwmod = {
.name = "gpio4",
.class = &omap44xx_gpio_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap44xx_gpio4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs),
@@ -1961,6 +1990,7 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
static struct omap_hwmod omap44xx_gpio5_hwmod = {
.name = "gpio5",
.class = &omap44xx_gpio_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap44xx_gpio5_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs),
@@ -2014,6 +2044,7 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
static struct omap_hwmod omap44xx_gpio6_hwmod = {
.name = "gpio6",
.class = &omap44xx_gpio_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap44xx_gpio6_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs),
@@ -2093,6 +2124,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = {
static struct omap_hwmod omap44xx_hsi_hwmod = {
.name = "hsi",
.class = &omap44xx_hsi_hwmod_class,
+ .clkdm_name = "l3_init_clkdm",
.mpu_irqs = omap44xx_hsi_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs),
.main_clk = "hsi_fck",
@@ -2166,6 +2198,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
static struct omap_hwmod omap44xx_i2c1_hwmod = {
.name = "i2c1",
.class = &omap44xx_i2c_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
@@ -2219,6 +2252,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
static struct omap_hwmod omap44xx_i2c2_hwmod = {
.name = "i2c2",
.class = &omap44xx_i2c_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
@@ -2272,6 +2306,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
static struct omap_hwmod omap44xx_i2c3_hwmod = {
.name = "i2c3",
.class = &omap44xx_i2c_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs),
@@ -2325,6 +2360,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
static struct omap_hwmod omap44xx_i2c4_hwmod = {
.name = "i2c4",
.class = &omap44xx_i2c_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs),
@@ -2389,6 +2425,7 @@ static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = {
static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
.name = "ipu_c0",
.class = &omap44xx_ipu_hwmod_class,
+ .clkdm_name = "ducati_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.rst_lines = omap44xx_ipu_c0_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets),
@@ -2404,6 +2441,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
.name = "ipu_c1",
.class = &omap44xx_ipu_hwmod_class,
+ .clkdm_name = "ducati_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.rst_lines = omap44xx_ipu_c1_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets),
@@ -2418,6 +2456,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
static struct omap_hwmod omap44xx_ipu_hwmod = {
.name = "ipu",
.class = &omap44xx_ipu_hwmod_class,
+ .clkdm_name = "ducati_clkdm",
.mpu_irqs = omap44xx_ipu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs),
.rst_lines = omap44xx_ipu_resets,
@@ -2504,6 +2543,7 @@ static struct omap_hwmod_opt_clk iss_opt_clks[] = {
static struct omap_hwmod omap44xx_iss_hwmod = {
.name = "iss",
.class = &omap44xx_iss_hwmod_class,
+ .clkdm_name = "iss_clkdm",
.mpu_irqs = omap44xx_iss_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs),
.sdma_reqs = omap44xx_iss_sdma_reqs,
@@ -2585,6 +2625,7 @@ static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = {
static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
.name = "iva_seq0",
.class = &omap44xx_iva_hwmod_class,
+ .clkdm_name = "ivahd_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.rst_lines = omap44xx_iva_seq0_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets),
@@ -2600,6 +2641,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
.name = "iva_seq1",
.class = &omap44xx_iva_hwmod_class,
+ .clkdm_name = "ivahd_clkdm",
.flags = HWMOD_INIT_NO_RESET,
.rst_lines = omap44xx_iva_seq1_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets),
@@ -2614,6 +2656,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
static struct omap_hwmod omap44xx_iva_hwmod = {
.name = "iva",
.class = &omap44xx_iva_hwmod_class,
+ .clkdm_name = "ivahd_clkdm",
.mpu_irqs = omap44xx_iva_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs),
.rst_lines = omap44xx_iva_resets,
@@ -2686,6 +2729,7 @@ static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = {
static struct omap_hwmod omap44xx_kbd_hwmod = {
.name = "kbd",
.class = &omap44xx_kbd_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
.mpu_irqs = omap44xx_kbd_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs),
.main_clk = "kbd_fck",
@@ -2751,6 +2795,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = {
static struct omap_hwmod omap44xx_mailbox_hwmod = {
.name = "mailbox",
.class = &omap44xx_mailbox_hwmod_class,
+ .clkdm_name = "l4_cfg_clkdm",
.mpu_irqs = omap44xx_mailbox_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs),
.prcm = {
@@ -2840,6 +2885,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
.name = "mcbsp1",
.class = &omap44xx_mcbsp_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_mcbsp1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs),
.sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
@@ -2913,6 +2959,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
.name = "mcbsp2",
.class = &omap44xx_mcbsp_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_mcbsp2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs),
.sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
@@ -2986,6 +3033,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
.name = "mcbsp3",
.class = &omap44xx_mcbsp_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_mcbsp3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs),
.sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
@@ -3038,6 +3086,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
.name = "mcbsp4",
.class = &omap44xx_mcbsp_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mcbsp4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs),
.sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
@@ -3130,6 +3179,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = {
static struct omap_hwmod omap44xx_mcpdm_hwmod = {
.name = "mcpdm",
.class = &omap44xx_mcpdm_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_mcpdm_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs),
.sdma_reqs = omap44xx_mcpdm_sdma_reqs,
@@ -3215,6 +3265,7 @@ static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {
static struct omap_hwmod omap44xx_mcspi1_hwmod = {
.name = "mcspi1",
.class = &omap44xx_mcspi_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mcspi1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs),
.sdma_reqs = omap44xx_mcspi1_sdma_reqs,
@@ -3275,6 +3326,7 @@ static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {
static struct omap_hwmod omap44xx_mcspi2_hwmod = {
.name = "mcspi2",
.class = &omap44xx_mcspi_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mcspi2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs),
.sdma_reqs = omap44xx_mcspi2_sdma_reqs,
@@ -3335,6 +3387,7 @@ static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {
static struct omap_hwmod omap44xx_mcspi3_hwmod = {
.name = "mcspi3",
.class = &omap44xx_mcspi_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mcspi3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs),
.sdma_reqs = omap44xx_mcspi3_sdma_reqs,
@@ -3393,6 +3446,7 @@ static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {
static struct omap_hwmod omap44xx_mcspi4_hwmod = {
.name = "mcspi4",
.class = &omap44xx_mcspi_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mcspi4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs),
.sdma_reqs = omap44xx_mcspi4_sdma_reqs,
@@ -3477,6 +3531,7 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
static struct omap_hwmod omap44xx_mmc1_hwmod = {
.name = "mmc1",
.class = &omap44xx_mmc_hwmod_class,
+ .clkdm_name = "l3_init_clkdm",
.mpu_irqs = omap44xx_mmc1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs),
.sdma_reqs = omap44xx_mmc1_sdma_reqs,
@@ -3536,6 +3591,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = {
static struct omap_hwmod omap44xx_mmc2_hwmod = {
.name = "mmc2",
.class = &omap44xx_mmc_hwmod_class,
+ .clkdm_name = "l3_init_clkdm",
.mpu_irqs = omap44xx_mmc2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs),
.sdma_reqs = omap44xx_mmc2_sdma_reqs,
@@ -3590,6 +3646,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = {
static struct omap_hwmod omap44xx_mmc3_hwmod = {
.name = "mmc3",
.class = &omap44xx_mmc_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mmc3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs),
.sdma_reqs = omap44xx_mmc3_sdma_reqs,
@@ -3642,6 +3699,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = {
static struct omap_hwmod omap44xx_mmc4_hwmod = {
.name = "mmc4",
.class = &omap44xx_mmc_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mmc4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs),
.sdma_reqs = omap44xx_mmc4_sdma_reqs,
@@ -3694,6 +3752,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = {
static struct omap_hwmod omap44xx_mmc5_hwmod = {
.name = "mmc5",
.class = &omap44xx_mmc_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_mmc5_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs),
.sdma_reqs = omap44xx_mmc5_sdma_reqs,
@@ -3735,6 +3794,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {
static struct omap_hwmod omap44xx_mpu_hwmod = {
.name = "mpu",
.class = &omap44xx_mpu_hwmod_class,
+ .clkdm_name = "mpu_clkdm",
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs),
@@ -3807,6 +3867,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {
static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
.name = "smartreflex_core",
.class = &omap44xx_smartreflex_hwmod_class,
+ .clkdm_name = "l4_ao_clkdm",
.mpu_irqs = omap44xx_smartreflex_core_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs),
.main_clk = "smartreflex_core_fck",
@@ -3853,6 +3914,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {
static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
.name = "smartreflex_iva",
.class = &omap44xx_smartreflex_hwmod_class,
+ .clkdm_name = "l4_ao_clkdm",
.mpu_irqs = omap44xx_smartreflex_iva_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs),
.main_clk = "smartreflex_iva_fck",
@@ -3899,6 +3961,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = {
static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
.name = "smartreflex_mpu",
.class = &omap44xx_smartreflex_hwmod_class,
+ .clkdm_name = "l4_ao_clkdm",
.mpu_irqs = omap44xx_smartreflex_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs),
.main_clk = "smartreflex_mpu_fck",
@@ -3964,6 +4027,7 @@ static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = {
static struct omap_hwmod omap44xx_spinlock_hwmod = {
.name = "spinlock",
.class = &omap44xx_spinlock_hwmod_class,
+ .clkdm_name = "l4_cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL,
@@ -4044,6 +4108,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = {
static struct omap_hwmod omap44xx_timer1_hwmod = {
.name = "timer1",
.class = &omap44xx_timer_1ms_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
.mpu_irqs = omap44xx_timer1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs),
.main_clk = "timer1_fck",
@@ -4089,6 +4154,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = {
static struct omap_hwmod omap44xx_timer2_hwmod = {
.name = "timer2",
.class = &omap44xx_timer_1ms_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_timer2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs),
.main_clk = "timer2_fck",
@@ -4134,6 +4200,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = {
static struct omap_hwmod omap44xx_timer3_hwmod = {
.name = "timer3",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_timer3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs),
.main_clk = "timer3_fck",
@@ -4179,6 +4246,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = {
static struct omap_hwmod omap44xx_timer4_hwmod = {
.name = "timer4",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_timer4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs),
.main_clk = "timer4_fck",
@@ -4243,6 +4311,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = {
static struct omap_hwmod omap44xx_timer5_hwmod = {
.name = "timer5",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_timer5_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs),
.main_clk = "timer5_fck",
@@ -4307,6 +4376,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = {
static struct omap_hwmod omap44xx_timer6_hwmod = {
.name = "timer6",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_timer6_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs),
.main_clk = "timer6_fck",
@@ -4371,6 +4441,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = {
static struct omap_hwmod omap44xx_timer7_hwmod = {
.name = "timer7",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_timer7_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs),
.main_clk = "timer7_fck",
@@ -4435,6 +4506,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = {
static struct omap_hwmod omap44xx_timer8_hwmod = {
.name = "timer8",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_timer8_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs),
.main_clk = "timer8_fck",
@@ -4480,6 +4552,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = {
static struct omap_hwmod omap44xx_timer9_hwmod = {
.name = "timer9",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_timer9_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs),
.main_clk = "timer9_fck",
@@ -4525,6 +4598,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = {
static struct omap_hwmod omap44xx_timer10_hwmod = {
.name = "timer10",
.class = &omap44xx_timer_1ms_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_timer10_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs),
.main_clk = "timer10_fck",
@@ -4570,6 +4644,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = {
static struct omap_hwmod omap44xx_timer11_hwmod = {
.name = "timer11",
.class = &omap44xx_timer_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_timer11_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs),
.main_clk = "timer11_fck",
@@ -4642,6 +4717,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {
static struct omap_hwmod omap44xx_uart1_hwmod = {
.name = "uart1",
.class = &omap44xx_uart_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_uart1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs),
.sdma_reqs = omap44xx_uart1_sdma_reqs,
@@ -4694,6 +4770,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {
static struct omap_hwmod omap44xx_uart2_hwmod = {
.name = "uart2",
.class = &omap44xx_uart_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_uart2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs),
.sdma_reqs = omap44xx_uart2_sdma_reqs,
@@ -4746,6 +4823,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
static struct omap_hwmod omap44xx_uart3_hwmod = {
.name = "uart3",
.class = &omap44xx_uart_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_uart3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs),
@@ -4799,6 +4877,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {
static struct omap_hwmod omap44xx_uart4_hwmod = {
.name = "uart4",
.class = &omap44xx_uart_hwmod_class,
+ .clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_uart4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs),
.sdma_reqs = omap44xx_uart4_sdma_reqs,
@@ -4878,6 +4957,7 @@ static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = {
static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
.name = "usb_otg_hs",
.class = &omap44xx_usb_otg_hs_hwmod_class,
+ .clkdm_name = "l3_init_clkdm",
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.mpu_irqs = omap44xx_usb_otg_hs_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs),
@@ -4951,6 +5031,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
.name = "wd_timer2",
.class = &omap44xx_wd_timer_hwmod_class,
+ .clkdm_name = "l4_wkup_clkdm",
.mpu_irqs = omap44xx_wd_timer2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs),
.main_clk = "wd_timer2_fck",
@@ -5015,6 +5096,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
.name = "wd_timer3",
.class = &omap44xx_wd_timer_hwmod_class,
+ .clkdm_name = "abe_clkdm",
.mpu_irqs = omap44xx_wd_timer3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs),
.main_clk = "wd_timer3_fck",
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index e93438c..5d77c5b 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -519,6 +519,7 @@ struct omap_hwmod {
const char *main_clk;
struct clk *_clk;
struct omap_hwmod_opt_clk *opt_clks;
+ char *clkdm_name;
char *vdd_name;
struct voltagedomain *voltdm;
struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
--
1.7.0.4
--
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