[OMAP3] [PM] [QUERY] voltage not reducing with enable_off_mode

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hi all

On the 2.6.37 , I've seen that when I set enable_off_mode mode through
debug-fs, VDD1 ( as measured across pin 2 of J6 and GND on OMAP3 
EVM) increases from a nominal value of 1.225 V to 1.247 V.

When the uart finally times-out and the mpu_pwrdm enters OFF mode, 
it finally goes down to 1.237 V, which is still more than the nominal value.

This unexpected behaviour is in contrast to a 2.6.32 kernel that I tried with.
On probing further, I found that the VDD1 increase is happening when forced 
wakeup is called  on the iva2_clkdm clockdomain in omap_set_pwrdm_state()
as a response to setting the enable_off_mode flag.

It seems that after boot-up the iva2_pwrdm is in RET state from where its 
clock-domain needs to be force waken up before having its automatic 
Hardware supervised  transition bit-field set (reg field 
CM_CLKSTCTRL_IVA2.CLKTRCTRL_IVA2).

Why is this so ? Any inputs would be appreciated.

regards
Abhilash--
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