Re: [PATCH] omap: hwmod: add syss reset done flags to omap2, omap3 hwmods

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"Avinash.H.M." <avinashhm@xxxxxx> writes:

>> > > [    0.208892] omap_hwmod: i2c1: softreset failed (waited 10000 usec)
>> > > [    0.223114] omap_hwmod: i2c2: softreset failed (waited 10000 usec)
>> > > [    0.237335] omap_hwmod: i2c3: softreset failed (waited 10000 usec)
>> > > [    0.251525] omap_hwmod: gpio2: softreset failed (waited 10000 usec)
>> > > [    0.265594] omap_hwmod: gpio3: softreset failed (waited 10000 usec)
>> > > [    0.279693] omap_hwmod: gpio4: softreset failed (waited 10000 usec)
>> > > [    0.293762] omap_hwmod: gpio5: softreset failed (waited 10000 usec)
>> > > [    0.307861] omap_hwmod: gpio6: softreset failed (waited 10000 usec)
>
> Hi Paul, 
>
> I tested this on one more board and still got these softreset warnings.
> So this wasn't a board specific issue and debugged into what is causing
> these.
>
> The problem is the FCLK isn't enabled for these gpios(2..6) while
> resetting.  So the GPIO's are not resetting properly. Once i enable FCLK
> for them and then set the SYSCONFIG.SOFTRESET, then they are resetting
> and it is reflected in RESETDONE bit.

What do you mean by fclk here.  GPIO doesn't have an fclk.  The
interface clock provides the functional clock, and the optional debounce
clock (dbclk) is needed only when GPIO debounce is enabled.

I suggest you look at the "integration" sub chapter of the TRM for the
GPIO module.

> That being said, I was looking for accessing gpio2_fck in the
> gpio2_hwmod. But i find the structure as below, 
>
> static struct omap_hwmod omap3xxx_gpio2_hwmod = {
> 	.name		= "gpio2",
> 	.mpu_irqs	= omap3xxx_gpio2_irqs,
> 	.mpu_irqs_cnt	= ARRAY_SIZE(omap3xxx_gpio2_irqs),
> 	.main_clk	= "gpio2_ick",
>
> Is there any reason, why 'iclk' is set as the 'main_clk' and not 'fclk'.

There are no GPIO fclks.

> Also 'fclk' is structured as 'gpio2_dbck' and made as an optional
> clock.  I wasn't very sure, why the name 'dbck'?

dbck == debounce clock

Kevin
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