Hi,
On Mar 7, 2011, at 6:46 PM, Orjan Friberg wrote:
> I'm looking at configuring an OMAP 3730 board for 200 MHz SDRAM.
>
> I've been looking at the kernel code (arch/arm/mach-omap2) the last
> couple of days to try and figure out what I need to do. We're basing ourselves off of the Beagleboard, so I tried copying the 200 MHz Hynix SDRAM entry for Beagleboard-xM but that didn't help: it still (re)programs the SDRC clock to 166 MHz.
You probably need update x-loader. Try using the beagleboard x-loader project located at gitorious (v1.44) or the ti arago one (1.48, but not quite the latest in terms of support for beagleboard xm parts).
Looking at board/omap3530beagle/omap3530beagle.c for the memory part definitions. For the XM, the Numonyx part is at 165Mhz, and the Micron part is at 200Mhz.
case REVISION_XM:
if (identify_xm_ddr() == MICRON_DDR) {
__raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
__raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_0);
__raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_1);
__raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0);
__raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0);
__raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1);
__raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1);
__raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0);
__raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1);
} else {
__raw_writel(0x4, SDRC_CS_CFG); /* 512MB/bank */
__raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_0);
__raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_1);
__raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
__raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
__raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
__raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
__raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
__raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
}
break;
Elvis Dowson
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