* Pedanekar, Hemant <hemantp@xxxxxx> [101129 09:07]:
> Tony Lindgren wrote on Saturday, November 06, 2010 2:30 AM:
>
> Though based on Cortex A8, TI816X series has differences in PRCM, PLL, clock
> structure compared to OMAP3.
>
> Many of the OMAP3 specific checks are not applicable for TI816X. For example,
> consider following:
> File - arch/arm/mach-omap2/omap_hwmod.c
> Function - _wait_target_ready()
>
> if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
> ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
> oh->prcm.omap2.idlest_reg_id,
> oh->prcm.omap2.idlest_idle_bit);
>
> The above code inside cpu_is_omap34xx() check is not applicable for TI816X as
> there are no CM_IDELST registers.
OK, so places like these will need different handling, and should
then be based on some idlest flag that gets set during the init
based on cpu_is_omap24xx() || cpu_is_omap3430() || cpu_is_omap3630().
Have you looked at defining cpu_is_ti816x() based on features?
Something like:
#define cpu_is_ti816x() (cpu_is_omap34xx() && \
(omap3_has_xyz())
Where xyz is based on some runtime detected flag, just like
we do for sgx and iva.
Regards,
Tony
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