Santosh Shilimkar <santosh.shilimkar@xxxxxx> writes: > The AXI protocol specifies that the write response can only > be sent back to an AXI master when the last write data has been > accepted. This optimization enables the PL310 to send the write > response of certain write transactions as soon as the store buffer > accepts the write address. This behavior is not compatible with > the AXI protocol and is disabled by default. You enable this > optimization by setting the Early BRESP Enable bit in the > Auxiliary Control Register (bit [30]). Did you measure the performance difference this makes, if any? -- Måns Rullgård mans@xxxxxxxxx -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
