On Fri, Nov 19, 2010 at 2:54 AM, Nishanth Menon <nm@xxxxxx> wrote:
> From: Eduardo Valentin <eduardo.valentin@xxxxxxxxx>
>
> We need to disable the autoidle bit from MPU INTC,
> otherwise INTC would get stall, and we would never
> come out of WFI. This must be done before save secure ram
> as well because save secure ram also does WFI.
>
> This patch is just a addition to the current W/A we have for i540,
> in order to cover the WFI inside the save secure ram.
>
> Signed-off-by: Eduardo Valentin <eduardo.valentin@xxxxxxxxx>
> ---
> arch/arm/mach-omap2/pm34xx.c | 10 ++++++++--
> 1 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index f520b38..c7e2db0 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -422,6 +422,14 @@ void omap_sram_idle(void)
> omap3_per_save_context();
> }
>
> + /*
> + * We need to disable the autoidle bit from MPU INTC,
> + * otherwise INTC would get stall, and we would never
> + * come out of WFI. This is done here because
> + * save secure ram also does WFI.
> + */
The comment should mention the errata ID i540, for easier readability
and maintenance.
> + omap3_intc_prepare_idle();
> +
> /* CORE */
> if (core_next_state < PWRDM_POWER_ON) {
> omap_uart_prepare_idle(0);
> @@ -433,8 +441,6 @@ void omap_sram_idle(void)
> }
> }
>
> - omap3_intc_prepare_idle();
> -
> /*
> * On EMU/HS devices ROM code restores a SRDC value
> * from scratchpad which has automatic self refresh on timeout
> --
> 1.6.3.3
>
>
Regards,
Jean
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