On Thu, Nov 18, 2010 at 01:15:39PM -0600, Hari Kanigeri wrote:
disabling rx interrupt on omap4 is different than its pre-decessors. The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the interrupts instead of clearing the bit.
How nasty :-p
Signed-off-by: Hari Kanigeri <h-kanigeri2@xxxxxx> --- arch/arm/mach-omap2/mailbox.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 42dbfa4..82b5ced 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -195,7 +195,10 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox, struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; l = mbox_read_reg(p->irqdisable); - l &= ~bit; + if (cpu_is_omap44xx()) + l |= bit; + else + l &= ~bit;
you should not use cpu_is_* checks on drivers. Even though this is located under mach-omap2, it's still a normal driver and you should not use those checks. Pass a flag like "has_twisted_rx_irq_disable" via platform_data and use that instead. -- balbi -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
