* Mathias Nyman <mathias.nyman@xxxxxxxxx> [101025 07:22]:
> Flush the writes to IRQSTATUS_L0 register in the DMA interrupt handler by reading the register
> directly after write. This prevents the spurious DMA interrupts noted when using VDD_OPP 1
Adding this to omap-fixes. For future arch/arm/*omap*/ patches,
please always Cc also linux-arm-kernel list. That way I can
apply the patch without a need to repost.
Regards,
Tony
> Signed-off-by: Mathias Nyman <mathias.nyman@xxxxxxxxx>
> ---
> arch/arm/plat-omap/dma.c | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
> index f5c5b8d..2c28265 100644
> --- a/arch/arm/plat-omap/dma.c
> +++ b/arch/arm/plat-omap/dma.c
> @@ -1983,6 +1983,8 @@ static int omap2_dma_handle_ch(int ch)
>
> dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch));
> dma_write(1 << ch, IRQSTATUS_L0);
> + /* read back the register to flush the write */
> + dma_read(IRQSTATUS_L0);
>
> /* If the ch is not chained then chain_id will be -1 */
> if (dma_chan[ch].chain_id != -1) {
> --
> 1.5.6.5
>
> --
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