Felipe Balbi <balbi@xxxxxx> writes:
> Add 32k timer hwmod to the database.
>
> Signed-off-by: Felipe Balbi <balbi@xxxxxx>
> ---
Looking closer at this patch, there are some other problems...
[...]
> +static struct omap_hwmod omap2420_counter_32k_hwmod = {
> + .name = "counter_32k",
> + .class = &omap2420_counter_hwmod_class,
> + .main_clk = "sync_32k_ick",
> + .prcm = {
> + .omap2 = {
> + .prcm_reg_id = 1,
> + .module_bit = OMAP24XX_EN_GPT1_SHIFT,
> + .idlest_reg_id = 1,
> + .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> + },
> + },
You're using the PRCM bits for GPT1, which is not the same as the 32k
counter.
So if this worked, it would be toggling GPT1, which is the kernel timer,
and that would be a rather bad thing.
[...]
> +static struct omap_hwmod omap2430_counter_32k_hwmod = {
> + .name = "counter_32k",
> + .class = &omap2430_counter_hwmod_class,
> + .main_clk = "sync_32k_ick",
> + .prcm = {
> + .omap2 = {
> + .prcm_reg_id = 1,
> + .module_bit = OMAP24XX_EN_GPT1_SHIFT,
> + .idlest_reg_id = 1,
> + .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
> + },
> + },
GPT1 again
[...]
> +static struct omap_hwmod omap3xxx_counter_32k_hwmod = {
> + .name = "counter_32k",
> + .class = &omap3xxx_counter_hwmod_class,
> + .main_clk = "omap_32ksync_ick",
> + .prcm = {
> + .omap2 = {
> + .prcm_reg_id = 1,
> + .module_bit = OMAP3430_EN_GPT1_SHIFT,
> + .idlest_reg_id = 1,
> + .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
> + },
> + },
and again
> + .slaves = omap3xxx_counter_32k_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap3xxx_counter_32k_slaves),
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
Kevin
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