RE: [PATCH 1/2] OMAP3 PM: move omap3 sleep to ddr

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Kevin,

> -----Original Message-----
> From: Kevin Hilman [mailto:khilman@xxxxxxxxxxxxxxxxxxx]
> Sent: Saturday, September 25, 2010 1:28 AM
> To: Sripathy, Vishwanath
> Cc: linux-omap@xxxxxxxxxxxxxxx; linaro-dev@xxxxxxxxxxxxxxxx
> Subject: Re: [PATCH 1/2] OMAP3 PM: move omap3 sleep to ddr
> 
> Vishwanath BS <vishwanath.bs@xxxxxx> writes:
> 
> > There is no need to keep omap3 sleep code in SRAM.
> > This code can be run very well on DDR.
> 
> /me remains skeptical
> 
> > This would help us to instrument CPUIdle latencies.
> 
> Indeed, but...
> 
> I'm afraid we will need a much more descriptive changelog here,
> describing in detail why this will still work, and what about the
> previous motiviations for running SRAM has changed such that this will
> work out of SRAM.
Running the code from SRAM for CPUIdle was more of legacy from OMAP2 and there was no technical reason why it cannot be run from DDR. Also note that, once MPU enters off mode, wake up code used to run from DDR earlier (w/o these changes) as well. I will put more details in the change log.
> 
> > Tested on ZOOM3.
> 
> Tested in what way?  This path is used for both idle and suspend, and
> needs to be validated for retention and off mode.
I have tested for both retention and off mode in both CPU idle and suspend path. I will update the changelog in next version. 

Vishwa
> 
> Kevin
> 
> > Signed-off-by: Vishwanath BS <vishwanath.bs@xxxxxx>
> > Cc: Kevin Hillman <khilman@xxxxxxxxxxxxxxxxxxx>
> > Cc: <Linaro> linaro-dev@xxxxxxxxxxxxxxxx
> > ---
> >  arch/arm/mach-omap2/pm34xx.c |    9 +--------
> >  1 files changed, 1 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> > index 85ef245..ed9d12c 100644
> > --- a/arch/arm/mach-omap2/pm34xx.c
> > +++ b/arch/arm/mach-omap2/pm34xx.c
> > @@ -79,8 +79,6 @@ struct power_state {
> >
> >  static LIST_HEAD(pwrst_list);
> >
> > -static void (*_omap_sram_idle)(u32 *addr, int save_state);
> > -
> >  static int (*_omap_save_secure_sram)(u32 *addr);
> >
> >  static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
> > @@ -360,9 +358,6 @@ void omap_sram_idle(void)
> >  	int core_prev_state, per_prev_state;
> >  	u32 sdrc_pwr = 0;
> >
> > -	if (!_omap_sram_idle)
> > -		return;
> > -
> >  	pwrdm_clear_all_prev_pwrst(mpu_pwrdm);
> >  	pwrdm_clear_all_prev_pwrst(neon_pwrdm);
> >  	pwrdm_clear_all_prev_pwrst(core_pwrdm);
> > @@ -438,7 +433,7 @@ void omap_sram_idle(void)
> >  	 * get saved. The restore path then reads from this
> >  	 * location and restores them back.
> >  	 */
> > -	_omap_sram_idle(omap3_arm_context, save_state);
> > +	omap34xx_cpu_suspend(omap3_arm_context, save_state);
> >  	cpu_init();
> >
> >  	if (is_suspending())
> > @@ -995,8 +990,6 @@ static int __init clkdms_setup(struct clockdomain *clkdm,
> void *unused)
> >
> >  void omap_push_sram_idle(void)
> >  {
> > -	_omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend,
> > -					omap34xx_cpu_suspend_sz);
> >  	if (omap_type() != OMAP2_DEVICE_TYPE_GP)
> >  		_omap_save_secure_sram =
> omap_sram_push(save_secure_ram_context,
> >  				save_secure_ram_context_sz);
--
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