From: Madhusudhan Chikkature <madhu.cr@xxxxxx> Add a delay after CMD line reset to accomdate the reset to complete. The SYSCTL seems to reflect SRC immediately which might not really be indicating the complete of reset. This is observed only with ES2.0 silicon Signed-off-by: Madhusudhan Chikkature <madhu.cr@xxxxxx> --- drivers/mmc/host/omap_hsmmc.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 4a8776f..1c359f0 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -986,6 +986,14 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, (i++ < limit)) cpu_relax(); + /* + * On OMAP4 ES2 the SRC is zero in the first loop itself strangely + * vs on ES1 it takes some time. + * Could be a an issue on ES2 to indicate reset complete even before + * it is complete. + */ + udelay(500); + if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) dev_err(mmc_dev(host->mmc), "Timeout waiting on controller reset in %s\n", -- 1.6.0.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
