Re: [PATCH 1/6] ARM: Add inline function smp_cpu() for early init testing

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* Tony Lindgren <tony@xxxxxxxxxxx> [100902 17:00]:
> * Tony Lindgren <tony@xxxxxxxxxxx> [100902 12:20]:
> 
> Heh, turns out there's a bit of a bug in the code snippet above :) It should
> be !((mpidr >> 30) & 1) instead, otherwise it always returns 0.

This too can check for value of 2. Also we probably want to do the
CPU type checks too. Updated patch below.

Tony
From: Tony Lindgren <tony@xxxxxxxxxxx>
Date: Mon, 30 Aug 2010 14:00:54 -0700
Subject: [PATCH] ARM: Add inline function smp_cpu() for early init testing

Add inline function smp_cpu() for early init checks, and
change build_mem_type_table to use it.

Inline function copied from cpu_is_part_of_mp_system() by
Will Deacon <will.deacon@xxxxxxx>.

Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>

diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index 8db3512..50a4f0b 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -39,4 +39,24 @@ static inline int cache_ops_need_broadcast(void)
 #define UP(instr...)	_str(instr)
 #endif
 
+static inline int smp_cpu(void)
+{
+        u32 val;
+
+	val = read_cpuid(CPUID_ID);
+
+	/* Check for ARM CPU */
+	if ((val & 0xff000000) != 0x41000000)
+		return 0;
+
+	/* Check for ARMv6 or 7 */
+	if ((val & 0x00070000) != 0x00070000)
+		return 0;
+
+	/* Check MPIDR */
+        asm ("mrc p15, 0, %0, c0, c0, 5" : "=r" (val));
+
+        return (val >> 30) == 2;
+}
+
 #endif
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6e1c4f6..2bfaefd 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -430,15 +430,17 @@ static void __init build_mem_type_table(void)
 		/*
 		 * Mark memory with the "shared" attribute for SMP systems
 		 */
-		user_pgprot |= L_PTE_SHARED;
-		kern_pgprot |= L_PTE_SHARED;
-		vecs_pgprot |= L_PTE_SHARED;
-		mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
-		mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
-		mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
-		mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
-		mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
-		mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+		if (smp_cpu()) {
+			user_pgprot |= L_PTE_SHARED;
+			kern_pgprot |= L_PTE_SHARED;
+			vecs_pgprot |= L_PTE_SHARED;
+			mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
+			mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
+			mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
+			mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
+			mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
+			mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+		}
 #endif
 	}
 

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