Tarun Kanti DebBarma <tarun.kanti@xxxxxx> writes:
> This patch uses the new register structures and mappings in functions
> in order to access register offsets thereby supporting multi-platform
> environment.
>
> Signed-off-by: Partha Basak <p-basak2@xxxxxx>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@xxxxxx>
> Signed-off-by: Thara Gopinath <thara@xxxxxx>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@xxxxxx>
> Cc: Paul Walmsley <paul@xxxxxxxxx>
> Cc: Kevin Hilman <khilman@xxxxxxxxxxxxxxxxxxx>
> Cc: Tony Lindgren <tony@xxxxxxxxxxx>
> ---
> arch/arm/plat-omap/dmtimer.c | 51 ++++++++++++++++++++++++++++++++----------
> 1 files changed, 39 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
> index 14a20e0..24ca283 100755
> --- a/arch/arm/plat-omap/dmtimer.c
> +++ b/arch/arm/plat-omap/dmtimer.c
> @@ -154,6 +154,7 @@ struct omap_dm_timer {
> unsigned long fclk_rate;
> int irq;
> void __iomem *io_base;
> + u32 *regs;
> unsigned reserved:1;
> unsigned enabled:1;
> unsigned posted:1;
> @@ -174,13 +175,14 @@ static DEFINE_SPINLOCK(dm_timer_lock);
> * pending bit must be checked. Otherwise a read of a non completed write
> * will produce an error.
> **/
> -static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
> +static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg)
'reg' could stay unsigned, it's a non-zero index. If anything, you
could change it to a u8.
> {
> if (timer->posted)
> - while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
> - & (reg >> WPSHIFT))
> + while (readl(timer->io_base + \
'\' is not needed
[...]
Kevin
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