Re: DSS2: DSI: Check for TX FIFO emptiness when sending long packets

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On Mon, 2010-07-26 at 11:28 +0200, ext Taneja, Archit wrote:
> Hi,
> 
> I had a little query. We check for TX FIFO not full before
> sending a short packet in dsi_vc_send_short(), but we
> don't have a similar check in dsi_vc_send_long() before
> writing to the long packet header.
> 
> There is a check of the static fifo size of the channel and
> the length of data we are pushing, but that does not reflect
> the state of the TX FIFO at that point of time.
> 
> Do you think we should have a check using DSI_TX_FIFO_VC_EMPTINESS
> before writing to the long packet header?

Yes, I think we should check that. Otherwise the transfer will break
with DSI_VC_IRQ_FIFO_TX_OVF interrupt, although I think the lcd driver
doesn't currently see this in any way.

Although I'm not sure which would be better, return an error (EBUSY?
EWOULDBLOCK?) if the FIFO cannot hold the whole message, or block until
the FIFO can hold the whole message...

 Tomi


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