[PATCH resend] omap: 3630: disable TLL SAR on 3630 ES1

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USBTLL Save-and-Restore is broken in 3630 ES1.0. Having it
enabled could result in incorrect register restores as
the OMAP exits off-mode. This could potentially result in
unexpected wakeup events.

This is fixed in ES1.1. So disable it for ES1.0s.

Signed-off-by: Anand Gadiyar <gadiyar@xxxxxx>
Cc: Paul Walmsley <paul@xxxxxxxxx>
---
This is a fix for buggy hardware, and it would be nice
to see this in the next merge window too.

Depends on the patch I just posted which adds the
CHIP_GE_OMAP3630ES1_1 macro
<https://patchwork.kernel.org/patch/111147/>

 arch/arm/mach-omap2/powerdomains34xx.h |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Index: linux-omap-2.6/arch/arm/mach-omap2/powerdomains34xx.h
===================================================================
--- linux-omap-2.6.orig/arch/arm/mach-omap2/powerdomains34xx.h
+++ linux-omap-2.6/arch/arm/mach-omap2/powerdomains34xx.h
@@ -80,7 +80,8 @@ static struct powerdomain core_3xxx_pre_
 	.prcm_offs	  = CORE_MOD,
 	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
 					   CHIP_IS_OMAP3430ES2 |
-					   CHIP_IS_OMAP3430ES3_0),
+					   CHIP_IS_OMAP3430ES3_0 |
+					   CHIP_IS_OMAP3630ES1),
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 2,
@@ -97,7 +98,8 @@ static struct powerdomain core_3xxx_pre_
 static struct powerdomain core_3xxx_es3_1_pwrdm = {
 	.name		  = "core_pwrdm",
 	.prcm_offs	  = CORE_MOD,
-	.omap_chip	  = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
+	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1 |
+					  CHIP_GE_OMAP3630ES1_1),
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.flags		  = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
--
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