Hi, > On Thu, 2010-07-01 at 12:31 +0200, ext Archit Taneja wrote: > > From: Semwal, Sumit <sumit.semwal@xxxxxx> > > > > Introduce OMAP4 DISPC base address and Secondary LCD Channel > > registers, use them in register dumps. <snip> > > #define DISPC_DIVISOR DISPC_REG(0x0070) > > +#define DISPC_DIVISOR1 DISPC_REG(0x0804) > > What is this? On OMAP4 there are 3 divisor registers, DIVISOR, DIVISOR1, DIVISOR2. The first one can divide the DSS_CLK coming from the PRCM for DISPC_FCLK, the last 2 provide pcd and lcd divisors for the 2 channels respectively. The addresses and the naming are a bit confusing: OMAP3: DISPC_DIVISOR - 0x0070 OMAP4: DISPC_DIVISOR - 0x0804 DISPC_DIVISOR1 - 0x0070 DISPC_DIVISOR2 - 0x040C We really don't need this common divisor thing, so in order to make minimal changes in the code we swapped the names of DIVISOR and DIVISOR1, this also makes it fit well with the OMAP3 code. You will see that DIPC_DIVISOR1 is not used at all, I just added it for completeness, I will remove when I resubmit this series. <snip> > > > #define DISPC_GLOBAL_ALPHA DISPC_REG(0x0074) > > +#define DISPC_DIVISOR2 DISPC_REG(0x040C) > > +#define DISPC_CONFIG2 DISPC_REG(0x0620) > > + > > #define DISPC_MAX_NR_ISRS 8 > > Would it be possible to have similar system to these registers as with > for example the VID registers: > > DISPC_SIZE_LCD(n) where n is 0 or 1, or possibly the channel. > > This would reduce ifs quite a bit in the following patches. Unfortunately, there is no linear mapping for the channel registers as it is in the video plane. But I agree it is still worth it to explicitly mention the addresses in the definitions. It would make the later patches much cleaner. > > Tomi > Thanks, Archit-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
