On 03/15/2010 11:57 AM, Ben Gamari wrote: > When measuring the SIMO signal on the expansion connector with my daughterboard > connected, I noticed that the daughterboard's level shifter appeared to be > driving the signal higher than it should, to ~2.9 Volts. I then checked the > 1.8V rail voltage and found that it too was higher than expected, again at 2.9 > volts. When I unplug the daughterboard, the 1.8V rail voltage returns to its > expected value. > > On Mon, 15 Mar 2010 10:38:38 -0400, Ned Forrester <nforrester@xxxxxxxx> wrote: >> I'd be happy to check your circuit for you, if it were posted in a more >> widely used format. How about a PDF of the schematic. >> > Certainly, it's a available at http://goldnerlab.physics.umass.edu/~bgamari/schematic.png. Your problem is likely caused by pulling the THREE STATE pin to 5V. The spec sheet is explicit (in the Absolute Maximum ratings on page 2, and in the functional description on page 12 that this pin should be pulled to VL, not VCC to enable the outputs. Likely by pulling it to 5V the some part of the chip is biased wrong and may cause OVL1 to be pulled above VL. I can't exactly explain the symptoms you report above, based on the mis-connected pin, but most anything could be happening in the MAX3390 once the absolute maximum ratings have been exceeded. The 10K resistors on the THREE STATE lines may have saved the circuit from permanent damage, but they may not save it from improper operation. Other suggestions, nothing fatal... 1. The pinout of the MAX3390E on the drawing is for the TSSOP package. Hopefully that is the package you actually used. 2. All uncommitted inputs should be terminated high or low. This applies to: LS2 pins 4, 5 and 13; LS3 pin 13 and possibly unused pins on the A/Ds and D/A. 3. The MAX3390E family has extremely low drive capability and slow response. Is this device really fast enough for your intended clock rates? Note that the device can only pull down 1ma, and can only pull up 20ua. If there are any pull-downs or pull-ups on the BeagleBoard, the MAX3390E might not be able to drive them. 4. I find it curious that the AVDD to the A/D and D/A is fead through a 1ohm resistor that is paralleled by C11 and C12. Likely you meant to tie one side of each of C11 and C12 (the side now connected to C10 positive) to ground. That connection would make a filter to reduce the noise on AVDD rather than passing the noise along. 5. Is see on the Maxim site that this series of translators is not recommended for new design. Likely the suggested alternatives have much better specifications. -- Ned Forrester nforrester@xxxxxxxx Oceanographic Systems Lab 508-289-2226 Applied Ocean Physics and Engineering Dept. Woods Hole Oceanographic Institution Woods Hole, MA 02543, USA http://www.whoi.edu/ http://www.whoi.edu/sbl/liteSite.do?litesiteid=7212 http://www.whoi.edu/hpb/Site.do?id=1532 http://www.whoi.edu/page.do?pid=10079 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
