Hi Vishwanath, On Mon, 8 Feb 2010, Vishwanath BS wrote: > DPLL4 HS Divider (M2, M3, M4, M5 and M6) field width has been increased > by 1 bit in 3630. This patch has changes to accommodate this in CM > dynamically based on chip version. > Basically new clock nodes have been added for 3630 DPLL4 M2,M3,M4,M5 and > M6 and value of these nodes are used if cpu type is 3630. > > Signed-off-by: Vishwanath BS <vishwanath.bs@xxxxxx> This patch looks basically okay but needs to be updated and reposted after the first patch in this series is fixed, since some of the macro changes will now happen in the first patch. - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
