> -----Original Message----- > From: Russell King - ARM Linux [mailto:linux@xxxxxxxxxxxxxxxx] > Sent: Monday, January 11, 2010 8:15 PM > To: Catalin Marinas > Cc: Shilimkar, Santosh; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-omap@xxxxxxxxxxxxxxx; > tony@xxxxxxxxxxx; Woodruff, Richard > Subject: Re: [PATCH v3] ARM: L2 : Errata 588369: Clean & Invalidate do not invalidate clean lines > > On Mon, Jan 11, 2010 at 02:37:08PM +0000, Catalin Marinas wrote: > > On Mon, 2009-12-21 at 10:09 +0000, Santosh Shilimkar wrote: > > > @@ -139,7 +184,12 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) > > > spin_lock_irqsave(&l2x0_lock, flags); > > > } > > > } > > > +#ifdef CONFIG_PL310_ERRATA_588369 > > > + cache_wait(base + L2X0_CLEAN_LINE_PA, 1); > > > + cache_wait(base + L2X0_INV_LINE_PA, 1); > > > +#else > > > cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); > > > +#endif > > > > I don't think we need to way on two separate registers here. AFAICT, bit > > 1 of those registers is shared for all the operations. > > > > As a general comment, maybe an inline function called something like > > wait_writel(before/after) would be better than a lot of ifdefs in the > > code, especially if one has a different workaround other than using TI's > > secure monitor. > > Since the bit is shared between all 'R7' registers, the ifdef above makes > no sense. We can just wait on any R7 register - I suggest that bit of > code is left as-is. Ok. will update the patch. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
