Hello John, On Mon, 14 Dec 2009, John Faith wrote: > On Mon, Dec 14, 2009 at 2:58 PM, John Faith <jfaith7@xxxxxxxxx> wrote: > > On Mon, Dec 14, 2009 at 1:59 PM, Paul Walmsley <paul@xxxxxxxxx> wrote: > >> On Mon, 14 Dec 2009, John Faith wrote: > >> > >>> I'm trying to enable the sys_clkout2 pin in a 2.6.29 kernel for my > >>> 3530EVM-like board for the main clock line of an FPGA. I've added a > >>> MUX_CFG_34XX entry in mux.c, set the gpio direction in my board.c > >>> file, and set the rate in my driver with clk_set_parent(), > >>> clk_set_rate() but I do not see any output clock when probed with a > >>> scope. > >> > >> Sounds like either the clock is not enabled (use clk_enable() for this), > >> or there is a mux problem. > >> > >> You might also want to make sure that you've set the parent of > >> clkout2_src_ck appropriately, although you still should be able to get > >> something out of it. > > > > After 3 clk_get() for clkout2_src_ck, sys_clkout2, and func_96m_ck, I > > set the parent the same as n810.c with: > > > > clk_set_parent(sys_clkout2_src, func96m_clk); > > clk_set_rate(sys_clkout2, 12000000); > > > > Calling clk_enable(sys_clkout2); returns zero. > > > > To answer my own question, I was using: > func96m_clk = clk_get(&dev->dev, "func_96m_ck"); > > , but apparently should have been using: > func96m_clk = clk_get(&dev->dev, "cm_96m_fck"); > > which produces the expected clock output. Good to hear that it works :-) Do you think it would be a good idea to add a WARN() to clk_set_parent() for situations like this? The return value should indicate an error, of course, but those are rarely checked. - Paul
