On 27/11/2024 10:17, Romain Naour wrote: > Hello, > > Le 26/11/2024 à 20:04, Krzysztof Kozlowski a écrit : >> On 26/11/2024 18:33, Romain Naour wrote: >>> From: Romain Naour <romain.naour@xxxxxxx> >>> >>> Unlike the SK-TDA4VM (k3-j721e-sk) board, there is no clock generator >>> (CDCI6214RGET) on the BeagleBone AI-64 (k3-j721e-beagleboneai64) to >>> provide PCIe refclk signal to PCIe Endponts. So the ACSPCIE module must >>> provide refclk through PCIe_REFCLK pins. >>> >>> Use the new "ti,syscon-acspcie-proxy-ctrl" property to enable ACSPCIE >>> module's PAD IO Buffers. >>> >>> Signed-off-by: Romain Naour <romain.naour@xxxxxxx> >>> --- >>> With this patch, we can remove "HACK: Sierra: Drive clock out" patch >>> applied on vendor kernel for BeagleBone AI-64: >>> https://openbeagle.org/beagleboard/linux/-/commit/ad65d7ef675966cdbc5d75f2bd545fad1914ba9b >>> --- >>> arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 4 ++++ >>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 10 ++++++++-- >>> 2 files changed, 12 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts >>> index fb899c99753e..681e3af7ce6e 100644 >>> --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts >>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts >>> @@ -859,6 +859,10 @@ &pcie1_rc { >>> num-lanes = <2>; >>> max-link-speed = <3>; >>> reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_HIGH>; >>> + /* There is no on-board or external reference clock generators, >> >> Please use generic style comments, not netdev. > > Fixed. > >> >>> + * use refclk from the ACSPCIE module's PAD IO Buffers. >>> + */ >>> + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; >>> }; >>> >>> &ufs_wrapper { >>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>> index 0da785be80ff..9f47e7672922 100644 >>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>> @@ -5,6 +5,7 @@ >>> * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ >>> */ >>> #include <dt-bindings/phy/phy.h> >>> +#include <dt-bindings/phy/phy-cadence.h> >>> #include <dt-bindings/phy/phy-ti.h> >>> #include <dt-bindings/mux/mux.h> >>> >>> @@ -82,6 +83,11 @@ ehrpwm_tbclk: clock-controller@4140 { >>> reg = <0x4140 0x18>; >>> #clock-cells = <1>; >>> }; >>> + >>> + acspcie0_proxy_ctrl: acspcie0-ctrl@18090 { >> >> Node names should be generic. See also an explanation and list of >> examples (not exhaustive) in DT specification: >> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > > I updated to: "acspcie0_proxy_ctrl: acspcie-ctrl@18090" Not much changed. It's a system-controller? > >> >> >>> + compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon"; >> >> I am not familiar with naming, so is this j784s4 or j721e or K3 SoC? >> Compatible should be SoC specific. > > Me neither. Hm? So it is like a random change? > > "ti,j784s4-acspcie-proxy-ctrl" compatible is the only one available in the > syscon devicetree binding. Should we add a new "ti,j721e-acspcie-proxy-ctrl"? When you add new devices, add bindings. > > This patch is adapted from a recent commit on the TI's kernel for the j784s4 Soc: > https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/?h=ti-rt-linux-6.6.y&id=bb4442cd523d6e34c5db43fd78c9f579d6937f6a Sorry, v6.6 downstream code is totally irrelevant for this. They can introduce bugs or wrong code and this is never a reason to repeat the same in mainline. > > There is another example with "ti,j784s4-pcie-ctrl" compatible used from > k3-j722s-main.dtsi: > https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi?h=v6.12.1#n240 Well, people repeat the same mistakes over and over. Best regards, Krzysztof
