Re: sdhci-omap: issues with PM features since 5.16

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Le 30/01/2024 à 12:15, Tony Lindgren a écrit :
> * Romain Naour <romain.naour@xxxxxxxx> [240129 17:42]:
>> OK, I reproduced the same behavior on the AM574x evaluation board. I didn't know
>> that ios can report clock 0 Hz and vdd invalid when the device is idle. I
>> thought that was a symptom of my initial issue "mmc1: cache flush error -110".
>> So, there is no issue on AM574x evaluation board.
> OK
>> I don't understand how the emmc_pwrseq node can work on am5729-beagleboneai
>> using gpio5_7 as reset-gpio since this pin it's not connected (F13 ball)
>> 	emmc_pwrseq: emmc_pwrseq {
>> 		compatible = "mmc-pwrseq-emmc";
>> 		reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
>> 	};
> Sounds like that's only wired for some different revisions then?

I don't know, there are only two bord revision A1 and A2 but with a similar
schematic on emmc side.

>> Note that mmc2 node is using ti,needs-special-reset property that is not used in
>> shdci-omap driver but only in omap_hsmmc.
> OK I think that's leftover from the earier use of omap_hsmmc.
> Can you check that you have the dts property non-removable set for the emmc?

non-removable is set in mmc2 node.

/* eMMC */
&mmc2 {
	status = "okay";
	vmmc-supply = <&smps8_reg>;
	vqmmc-supply = <&smps8_reg>;
	bus-width = <8>;

	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
	pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_default>;
	pinctrl-2 = <&mmc2_pins_default>;
	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;

Best regards,

> Regards,
> Tony

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