Quoting Claudiu Beznea (2023-05-30 02:39:08)
> In case devm_clk_hw_register() fails for one of synth clocks the probe
> continues. Later on, when registering output clocks which have as parents
> all the synth clocks, in case there is registration failure for at least
> one synth clock the information passed to clk core for registering output
> clock is not right: init.num_parents is fixed but init.parents may contain
> an array with less parents.
>
> Fixes: 3044a860fd09 ("clk: Add Si5341/Si5340 driver")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
> ---
Applied to clk-next
