Hi Roger,
On 05/01/23 17:03, Roger Quadros wrote:
> On 02/01/2023 20:34, Andrew Lunn wrote:
>> On Mon, Jan 02, 2023 at 03:04:19PM +0200, Roger Quadros wrote:
>>>
>>>
>>> On 23/12/2022 16:28, Andrew Lunn wrote:
>>>>> + ethernet-ports {
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> + pruss2_emac0: port@0 {
>>>>> + reg = <0>;
>>>>> + phy-handle = <&pruss2_eth0_phy>;
>>>>> + phy-mode = "rgmii-rxid";
>>>>
>>>> That is unusual. Where are the TX delays coming from?
>>>
>>> >From the below property
>>>
>>> + ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
>>>
>>> The TX delay can be enabled/disabled from within the ICSSG block.
>>>
>>> If this property exists and PHY mode is neither PHY_INTERFACE_MODE_RGMII_ID
>>> nor PHY_INTERFACE_MODE_RGMII_TXID then the internal delay is enabled.
>>>
>>> This logic is in prueth_config_rgmiidelay() function in the introduced driver.
>>
>> What nearly every other MAC driver does is pass the phy-mode to the
>> PHY and lets the PHY add the delays. I would recommend you do that,
>> rather than be special and different.
>
>
> If I remember right we couldn't disable MAC TX delay on some earlier silicon
> so had to take this route. I don't remember why we couldn't disable it though.
>
> In more recent Silicon Manuals I do see that MAC TX delay can be enabled/disabled.
> If this really is the case then we should change to
>
> phy-mode = "rgmii-id";
>
> And let PHY handle the TX+RX delays.
>
> Danish,
> could you please make the change and test if it works on current silicon?
>
I changed the phy-mode to "rgmii-id" instead of "rgmii-rxid". I did the testing
on current silicon (AM654x SR 2.0) and it is working fine.
> cheers,
> -roger
Thanks and Regards,
Danish.
