On 24/11/2022 10:12, Matt Ranostay wrote:
> Add PCIe configuration for j784s4 platform which has 4x lane support.
>
> Tested-by: Achal Verma <a-verma1@xxxxxx>
> Signed-off-by: Matt Ranostay <mranostay@xxxxxx>
Reviewed-by: Roger Quadros <rogerq@xxxxxxxxxx>
> ---
> drivers/pci/controller/cadence/pci-j721e.c | 23 ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
> index dab3db9be6d8..c484d658c18a 100644
> --- a/drivers/pci/controller/cadence/pci-j721e.c
> +++ b/drivers/pci/controller/cadence/pci-j721e.c
> @@ -330,6 +330,21 @@ static const struct j721e_pcie_data am64_pcie_ep_data = {
> .max_lanes = 1,
> };
>
> +static const struct j721e_pcie_data j784s4_pcie_rc_data = {
> + .mode = PCI_MODE_RC,
> + .quirk_retrain_flag = true,
> + .is_intc_v1 = true,
> + .byte_access_allowed = false,
> + .linkdown_irq_regfield = LINK_DOWN,
> + .max_lanes = 4,
> +};
> +
> +static const struct j721e_pcie_data j784s4_pcie_ep_data = {
> + .mode = PCI_MODE_EP,
> + .linkdown_irq_regfield = LINK_DOWN,
> + .max_lanes = 4,
> +};
> +
> static const struct of_device_id of_j721e_pcie_match[] = {
> {
> .compatible = "ti,j721e-pcie-host",
> @@ -355,6 +370,14 @@ static const struct of_device_id of_j721e_pcie_match[] = {
> .compatible = "ti,am64-pcie-ep",
> .data = &am64_pcie_ep_data,
> },
> + {
> + .compatible = "ti,j784s4-pcie-host",
> + .data = &j784s4_pcie_rc_data,
> + },
> + {
> + .compatible = "ti,j784s4-pcie-ep",
> + .data = &j784s4_pcie_ep_data,
> + },
> {},
> };
>
--
cheers,
-roger
