Hi Matt,
On 24/11/2022 10:12, Matt Ranostay wrote:
> Various platforms have different maximum amount of lanes that can be
> selected. Add max_lanes to struct j721e_pcie to allow for detection of this
> which is needed to calculate the needed bitmask size for the possible lane
> count.
>
> Signed-off-by: Matt Ranostay <mranostay@xxxxxx>
> Signed-off-by: Vignesh Raghavendra <vigneshr@xxxxxx>
> ---
> drivers/pci/controller/cadence/pci-j721e.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
> index cc83a8925ce0..8990f58d64d5 100644
> --- a/drivers/pci/controller/cadence/pci-j721e.c
> +++ b/drivers/pci/controller/cadence/pci-j721e.c
> @@ -47,8 +47,6 @@ enum link_status {
>
> #define GENERATION_SEL_MASK GENMASK(1, 0)
>
> -#define MAX_LANES 2
> -
> struct j721e_pcie {
> struct cdns_pcie *cdns_pcie;
> struct clk *refclk;
> @@ -71,6 +69,7 @@ struct j721e_pcie_data {
> unsigned int quirk_disable_flr:1;
> u32 linkdown_irq_regfield;
> unsigned int byte_access_allowed:1;
> + unsigned int max_lanes;
> };
>
> static inline u32 j721e_pcie_user_readl(struct j721e_pcie *pcie, u32 offset)
> @@ -290,11 +289,13 @@ static const struct j721e_pcie_data j721e_pcie_rc_data = {
> .quirk_retrain_flag = true,
> .byte_access_allowed = false,
> .linkdown_irq_regfield = LINK_DOWN,
> + .max_lanes = 2,
> };
>
> static const struct j721e_pcie_data j721e_pcie_ep_data = {
> .mode = PCI_MODE_EP,
> .linkdown_irq_regfield = LINK_DOWN,
> + .max_lanes = 2,
> };
>
> static const struct j721e_pcie_data j7200_pcie_rc_data = {
> @@ -302,23 +303,27 @@ static const struct j721e_pcie_data j7200_pcie_rc_data = {
> .quirk_detect_quiet_flag = true,
> .linkdown_irq_regfield = J7200_LINK_DOWN,
> .byte_access_allowed = true,
> + .max_lanes = 2,
> };
>
> static const struct j721e_pcie_data j7200_pcie_ep_data = {
> .mode = PCI_MODE_EP,
> .quirk_detect_quiet_flag = true,
> .quirk_disable_flr = true,
> + .max_lanes = 2,
> };
>
> static const struct j721e_pcie_data am64_pcie_rc_data = {
> .mode = PCI_MODE_RC,
> .linkdown_irq_regfield = J7200_LINK_DOWN,
> .byte_access_allowed = true,
> + .max_lanes = 1,
> };
>
> static const struct j721e_pcie_data am64_pcie_ep_data = {
> .mode = PCI_MODE_EP,
> .linkdown_irq_regfield = J7200_LINK_DOWN,
> + .max_lanes = 1,
> };
>
> static const struct of_device_id of_j721e_pcie_match[] = {
> @@ -432,7 +437,7 @@ static int j721e_pcie_probe(struct platform_device *pdev)
> pcie->user_cfg_base = base;
>
> ret = of_property_read_u32(node, "num-lanes", &num_lanes);
> - if (ret || num_lanes > MAX_LANES)
> + if (ret || num_lanes > data->max_lanes)
> num_lanes = 1;
num_lanes = data->max_lanes; ?
Should we also print an error message saying that invalid num-lanes
was supplied in device tree?
Is it better to error out of probe?
> pcie->num_lanes = num_lanes;
>
cheers,
-roger
