From: Yegor Yefremov <yegorslists@xxxxxxxxxxxxxx>
Add GPIO names for both SoC and TCA6416 lines.
Signed-off-by: Yegor Yefremov <yegorslists@xxxxxxxxxxxxxx>
---
arch/arm/boot/dts/am335x-netcom-plus-8xx.dts | 156 +++++++++++++++++++
1 file changed, 156 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-netcom-plus-8xx.dts b/arch/arm/boot/dts/am335x-netcom-plus-8xx.dts
index 96dffd3ffd85..ad3adc7679f9 100644
--- a/arch/arm/boot/dts/am335x-netcom-plus-8xx.dts
+++ b/arch/arm/boot/dts/am335x-netcom-plus-8xx.dts
@@ -71,6 +71,10 @@
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
+ gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
+ "GP_IN4", "GP_IN5", "GP_IN6", "GP_IN7",
+ "GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
+ "GP_OUT4", "GP_OUT5", "GP_OUT6", "GP_OUT7";
};
};
@@ -86,6 +90,10 @@
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "CH1_M0", "CH1_M1", "CH1_M2", "CH1_M3",
+ "CH2_M0", "CH2_M1", "CH2_M2", "CH2_M3",
+ "CH3_M0", "CH3_M1", "CH3_M2", "CH3_M3",
+ "CH4_M0", "CH4_M1", "CH4_M2", "CH4_M3";
};
tca6416c: gpio@21 {
@@ -93,6 +101,10 @@
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "CH5_M0", "CH5_M1", "CH5_M2", "CH5_M3",
+ "CH6_M0", "CH6_M1", "CH6_M2", "CH6_M3",
+ "CH7_M0", "CH7_M1", "CH7_M2", "CH7_M3",
+ "CH8_M0", "CH8_M1", "CH8_M2", "CH8_M3";
};
};
@@ -113,3 +125,147 @@
ti,dual-emac-pvid = <2>;
phy-handle = <&phy1>;
};
+
+&gpio0 {
+ gpio-line-names =
+ "MDIO",
+ "MDC",
+ "NC",
+ "NC",
+ "I2C1_SDA",
+ "I2C1_SCL",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "I2C2_SDA",
+ "I2C2_SCL",
+ "NC",
+ "NC",
+ "onrisc:blue:wlan",
+ "onrisc:green:app",
+ "USB0_DRVVBUS",
+ "ETH2_INT",
+ "NC",
+ "NC",
+ "MMC1_DAT0",
+ "MMC1_DAT1",
+ "NC",
+ "NC",
+ "MMC1_DAT2",
+ "MMC1_DAT3",
+ "NC",
+ "NC",
+ "GPMC_WAIT0",
+ "GPMC_WP_N";
+};
+
+&gpio1 {
+ gpio-line-names =
+ "GPMC_AD0",
+ "GPMC_AD1",
+ "GPMC_AD2",
+ "GPMC_AD3",
+ "GPMC_AD4",
+ "GPMC_AD5",
+ "GPMC_AD6",
+ "GPMC_AD7",
+ "NC",
+ "NC",
+ "CONSOLE_RX",
+ "CONSOLE_TX",
+ "SW2_0_alt",
+ "SW2_1_alt",
+ "SW2_2_alt",
+ "SW2_3_alt",
+ "RGMII2_TCTL",
+ "RGMII2_RCTL",
+ "RGMII2_TD3",
+ "RGMII2_TD2",
+ "RGMII2_TD1",
+ "RGMII2_TD0",
+ "RGMII2_TCLK",
+ "RGMII2_RCLK",
+ "RGMII2_RD3",
+ "RGMII2_RD2",
+ "RGMII2_RD1",
+ "RGMII2_RD0",
+ "PMIC_INT1",
+ "GPMC_CSN0_Flash",
+ "MMC1_CLK",
+ "MMC1_CMD";
+};
+
+&gpio2 {
+ gpio-line-names =
+ "GPMC_CSN3_BUS",
+ "GPMC_CLK",
+ "GPMC_ADVN_ALE",
+ "GPMC_OEN_RE_N",
+ "GPMC_WE_N",
+ "GPMC_BEN0_CLE",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "SW2_0",
+ "SW2_1",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "MMC0_DAT3",
+ "MMC0_DAT2",
+ "MMC0_DAT1",
+ "MMC0_DAT0",
+ "MMC0_CLK",
+ "MMC0_CMD";
+};
+
+&gpio3 {
+ gpio-line-names =
+ "onrisc:red:power",
+ "NC",
+ "NC",
+ "NC",
+ "3G_PWR_EN",
+ "NC",
+ "NC",
+ "WLAN_IRQ",
+ "WLAN_EN",
+ "SW2_2",
+ "SW2_3",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC";
+};
--
2.17.0
