On Thu, Mar 31, 2022 at 4:42 PM Tony Lindgren <tony@xxxxxxxxxxx> wrote:
> diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c
> --- a/arch/arm/mach-omap2/omap-secure.c
> +++ b/arch/arm/mach-omap2/omap-secure.c
> @@ -59,8 +59,8 @@ static void __init omap_optee_init_check(void)
> u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,
> u32 arg3, u32 arg4)
> {
> + static u32 param[5];
> u32 ret;
> - u32 param[5];
I think for this one, you do need to use a DEFINE_PER_CPU() to make it
work when multiple cores run into the function concurrently. This is entered
on OMAP44xx from irq_notifier() with cmd==CPU_CLUSTER_PM_ENTER
and from start_secondary(). I suspect that one can show these never happen
on more than one CPU at a time, but I have not been able to prove that
myself.
> @@ -119,8 +119,8 @@ phys_addr_t omap_secure_ram_mempool_base(void)
> #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
> u32 omap3_save_secure_ram(void __iomem *addr, int size)
> {
> + static u32 param[5];
> u32 ret;
> - u32 param[5];
>
> if (size != OMAP3_SAVE_SECURE_RAM_SZ)
> return OMAP3_SAVE_SECURE_RAM_SZ;
> @@ -153,8 +153,8 @@ u32 omap3_save_secure_ram(void __iomem *addr, int size)
> u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
> u32 arg1, u32 arg2, u32 arg3, u32 arg4)
> {
> + static u32 param[5];
> u32 ret;
> - u32 param[5];
>
> param[0] = nargs+1; /* RX-51 needs number of arguments + 1 */
> param[1] = arg1;
These look good, as they are clearly only run on single-core SoCs
with preemption disabled.
Arnd
