* Ard Biesheuvel <ardb@xxxxxxxxxx> [211116 22:03]: > Of course, I may have missed something, but I wouldn't expect a > fundamental flaw in this logic to affect only OMAP3/4 based platforms > in such a weird way. Perhaps there is something I missed in terms of > TLB maintenance, although I would expect the existing fault handler to > take care of that. Looks like disabling the deeper idle states for cpuidle where the CPUSs get shut down and restored seems to work around the issue at least for omap4. The assembly code is in arch/arm/mach-omap2/sleep44xx.S, and in sleep34xx.S for omap3. No idea so far what might be causing this.. Regards, Tony
