Quoting Dario Binacchi (2021-06-06 13:22:53) > The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs. > As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for > the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for > DDR, PER, and CORE PLLs. > > Calculating the required values and setting the registers accordingly > was taken from the set_mpu_spreadspectrum routine contained in the > arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project. > > In locked condition, DPLL output clock = CLKINP *[M/N]. In case of > SSC enabled, the reference manual explains that there is a restriction > of range of M values. Since the omap2_dpll_round_rate routine attempts > to select the minimum possible N, the value of M obtained is not > guaranteed to be within the range required. With the new "ti,min-div" > parameter it is possible to increase N and consequently M to satisfy the > constraint imposed by SSC. > > Signed-off-by: Dario Binacchi <dariobin@xxxxxxxxx> > Reviewed-by: Tero Kristo <kristo@xxxxxxxxxx> > > --- Applied to clk-next
