Re: [PATCH v4 0/3] Fix pinctrl-single pcs_pin_dbg_show()

"Hawa, Hanna" <hhhawa@xxxxxxxxxx> · Wed, 24 Mar 2021 16:03:41 +0200

On 3/22/2021 7:56 AM, Drew Fustini wrote:
I'm curious what SoC are you using?

I'm working on Amazon Annapurna Labs SoCs (based on ARM cortex 
processors). That include multiple pins controlled with same register.

It's good to know who has hardware to test bits_per_mux in the future.

I pay attention to pinctrl-single as that is the driver used for the TI
AM3358 SoC used in a variety of BeagleBone boards.  It does not use
bits_per_mux, but I can verify that this does not cause any regression
for the AM3358 SoC:

   /sys/kernel/debug/pinctrl/44e10800.pinmux-pinctrl-single# cat pins
   registered pins: 142
   pin 0 (PIN0) 0:? 44e10800 00000027 pinctrl-single
   pin 1 (PIN1) 0:? 44e10804 00000027 pinctrl-single
   pin 2 (PIN2) 0:? 44e10808 00000027 pinctrl-single
   pin 3 (PIN3) 0:? 44e1080c 00000027 pinctrl-single
   pin 4 (PIN4) 0:? 44e10810 00000027 pinctrl-single
   pin 5 (PIN5) 0:? 44e10814 00000027 pinctrl-single
   pin 6 (PIN6) 0:? 44e10818 00000027 pinctrl-single
   pin 7 (PIN7) 0:? 44e1081c 00000027 pinctrl-single
   pin 8 (PIN8) 22:gpio-96-127 44e10820 00000027 pinctrl-single
   pin 9 (PIN9) 23:gpio-96-127 44e10824 00000037 pinctrl-single
   pin 10 (PIN10) 26:gpio-96-127 44e10828 00000037 pinctrl-single
   pin 11 (PIN11) 27:gpio-96-127 44e1082c 00000037 pinctrl-single
   pin 12 (PIN12) 0:? 44e10830 00000037 pinctrl-single
   <snip>
   pin 140 (PIN140) 0:? 44e10a30 00000028 pinctrl-single
   pin 141 (PIN141) 13:gpio-64-95 44e10a34 00000020 pinctrl-single

Reviewed-by: Drew Fustini<drew@xxxxxxxxxxxxxxx>

Thanks for review and verify the change.

Thanks,
Hanna

Thanks,
Drew