[PATCH 03/11] ARM: dts: Configure interconnect target module for omap5 mpu

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We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
---
 arch/arm/boot/dts/omap5.dtsi | 28 +++++++++++++++-------------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -125,19 +125,6 @@ wakeupgen: interrupt-controller@48281000 {
 		interrupt-parent = <&gic>;
 	};
 
-	/*
-	 * The soc node represents the soc top level view. It is used for IPs
-	 * that are not memory mapped in the MPU view or for the MPU itself.
-	 */
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap4-mpu";
-			ti,hwmods = "mpu";
-			sram = <&ocmcram>;
-		};
-	};
-
 	/*
 	 * XXX: Use a flat representation of the OMAP3 interconnect.
 	 * The real OMAP interconnect network is quite complex.
@@ -167,6 +154,21 @@ l4_cfg: interconnect@4a000000 {
 		l4_per: interconnect@48000000 {
 		};
 
+		target-module@48210000 {
+			compatible = "ti,sysc-omap4-simple", "ti,sysc";
+			power-domains = <&prm_mpu>;
+			clocks = <&mpu_clkctrl OMAP5_MPU_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x48210000 0x1f0000>;
+
+			mpu {
+				compatible = "ti,omap4-mpu";
+				sram = <&ocmcram>;
+			};
+		};
+
 		l4_abe: interconnect@40100000 {
 		};
 
-- 
2.30.1



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