Re: [PATCH v2 0/3] PCI: J721E: Fix Broken DT w.r.t SYSCON DT

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Hi Lorenzo,

On 04/12/20 1:21 pm, Kishon Vijay Abraham I wrote:
> Previously a subnode to syscon node was added which has the
> exact memory mapped address of pcie_ctrl but based on review comment
> provided by Rob [1], the offset is now being passed as argument to
> "ti,syscon-pcie-ctrl" phandle.
> 
> This series has both driver change and DT change. The driver change
> should be merged first and the driver takes care of maintaining old
> DT compatibility.

Can you queue the 1st two patches of this series for this merge window?
I'll ask NM to queue the DTS patch. Let me know if you want me to resend
only the first two patches as a separate series.

Thank You,
Kishon

> 
> Changes frm v1:
> *) Remove use of allOf in schema
> *) Added Fixes tag
> *) Maintain old DT compatibility
> 
> [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@xxxxxxxxxxxxxx
> 
> Kishon Vijay Abraham I (3):
>   dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument
>   PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl"
>     phandle arg
>   arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for
>     pcieX_ctrl
> 
>  .../bindings/pci/ti,j721e-pci-ep.yaml         | 11 +++--
>  .../bindings/pci/ti,j721e-pci-host.yaml       | 11 +++--
>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 48 ++++---------------
>  drivers/pci/controller/cadence/pci-j721e.c    | 28 +++++++----
>  4 files changed, 41 insertions(+), 57 deletions(-)
> 



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