* Lokesh Vutla <lokeshvutla@xxxxxx> [200228 09:58]: > Only the Timer control register(TCLR) cannot be updated when the timer > is running. Registers like Counter register(TCRR), loader register(TLDR), > match register(TMAR) can be updated when the counter is running. Since > TCLR is not updated in pwm_omap_dmtimer_config(), do not stop the > timer for period/duty_cycle update. Still works for me with "pwm: omap-dmtimer: Fix pwm disabling sequence" patch left out: Tested-by: Tony Lindgren <tony@xxxxxxxxxxx>
