Hi Tony, I found some time to update my drivers/stating/pvr/1.14.369993 tree to make use of the new sgx soc integration code and it works on omap5! > root@letux:~# modprobe pvrsrvkm_omap_omap5_sgx544_116 > [ 106.478254] pvrsrvkm_omap_omap5_sgx544_116: module is from the staging directory, the quality is unknown, you have been warned. > [ 106.526201] [drm] Initialized pvr 1.14.3699939 20110701 for 5600fe00.sgx on minor 1 > root@letux:~# pvrsrvctl --no-module --start > [ 261.091978] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] > root@letux:~# gles1test1 0 > ^C > root@letux:~# To make it work, I have added a child node to the target-module@56000000 that describes the img,sgx5xx. Here are the work-in-progress patches if you want to take a look inside: https://github.com/openpvrsgx-devgroup/linux_openpvrsgx/commits/letux/omap-pvr-soc-glue-v2 On omap3630 the driver module loads but pvrsrvinit fails: > root@letux:~# modprobe pvrsrvkm_omap_omap3630_sgx530_125 > [ 390.429260] pvrsrvkm_omap_omap3630_sgx530_125: module is from the staging directory, the quality is unknown, you have been warned. > [ 390.474304] [drm] Initialized pvr 1.14.3699939 20110701 for 50000000.sgx on minor 1 > root@letux:~# pvrsrvctl --start --no-module > [ 402.200439] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] > [ 402.219604] PVR_K:(Error): BridgedDispatchKM: Initialisation failed. Driver unusable. > PVR:(Error): LoaduKernelProgram : SGX ukernel program Device Addr: 0xe400000 invalid alignment [0, ] > PVR:(Error): SetupuKernel : Failed to load uKernel programs [0, ] > PVR:(Error): SrvInit: Initialisation for device of class 0, type 7, index 0, failed (1) [0, ] > PVR:(Error): PVRSRVBridgeCall: Failed to access device. Function ID:3223086862 (strerror returns no value.). [0, ] > pvrsrvctl: SrvInit failed (already initialized?) (err=PVRSRV_ERROR_OUT_OF_MEMORY - Unable to allocate required memory) > root@letux:~# Maybe I do not have done the address range translation properly. Or I am missing some of your PRM rstctrl patches since I am working on top of linus/master. Because of that I had to comment out prm_gfx in am33xx.dtsi to get it compile and could not test yet on Beagle Bone. A little unclear is how to properly handle omap4. omap4430/4440 and 4460 have the sgx540 while only omap4470 has an sgx544 inside. But omap4420/30 share one .dtsi and omap4460/70 the other. So we might have to define a new omap4470.dtsi and #include in the real omap4470 boards. And am3517 and am43/am57/am65/... support is missing. But that can be added later if we have it running on omap3 and am33xx. Anyways, we again have made a big step forwards. Let's hope that we can get the FLOSS part of the sgx drivers to staging in some not too far future. BR and thanks, Nikolaus > Am 26.08.2019 um 16:55 schrieb Tony Lindgren <tony@xxxxxxxxxxx>: > > * Tony Lindgren <tony@xxxxxxxxxxx> [190817 06:56]: >> * Stephen Boyd <sboyd@xxxxxxxxxx> [190815 18:24]: >>> Quoting Tony Lindgren (2019-08-14 06:14:06) >>>> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi >>>> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi >>>> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi >>>> @@ -1146,6 +1146,20 @@ >>>> }; >>>> }; >>>> >>>> + gpu_cm: gpu_cm@1500 { >>> >>> Node names shouldn't have underscores. Maybe clock-controller? >> >> OK yeah clock-controller sounds good to me. > > Below is this one updated to use clock-controller naming. > > Regards, > > Tony > > 8< --------------------------- > From tony Mon Sep 17 00:00:00 2001 > From: Tony Lindgren <tony@xxxxxxxxxxx> > Date: Wed, 14 Aug 2019 05:18:16 -0700 > Subject: [PATCH] ARM: dts: Configure sgx for omap5 > MIME-Version: 1.0 > Content-Type: text/plain; charset=UTF-8 > Content-Transfer-Encoding: 8bit > > I've tested that the interconnect target module enables and idles > just fine when probed with ti-sysc with PM runtime control via sys: > > # echo on > $(find /sys -name control | grep \/5600) > # rwmem 0x5600fe00 # OCP Revision > 0x5600fe00 = 0x40000000 > # echo auto > $(find /sys -name control | grep \/5600) > # rwmem 0x5600fe10 > # rwmem 0x56000024 > > Cc: Adam Ford <aford173@xxxxxxxxx> > Cc: Filip Matijević <filip.matijevic.pz@xxxxxxxxx> > Cc: "H. Nikolaus Schaller" <hns@xxxxxxxxxxxxx> > Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@xxxxxxxxx> > Cc: moaz korena <moaz@xxxxxxxxxx> > Cc: Merlijn Wajer <merlijn@xxxxxxxxxx> > Cc: Paweł Chmiel <pawel.mikolaj.chmiel@xxxxxxxxx> > Cc: Philipp Rossak <embed3d@xxxxxxxxx> > Cc: Tomi Valkeinen <tomi.valkeinen@xxxxxx> > Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx> > --- > arch/arm/boot/dts/omap5.dtsi | 23 +++++++++++++++++++++++ > arch/arm/boot/dts/omap54xx-clocks.dtsi | 14 ++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi > --- a/arch/arm/boot/dts/omap5.dtsi > +++ b/arch/arm/boot/dts/omap5.dtsi > @@ -257,6 +257,29 @@ > ports-implemented = <0x1>; > }; > > + target-module@56000000 { > + compatible = "ti,sysc-omap4", "ti,sysc"; > + reg = <0x5600fe00 0x4>, > + <0x5600fe10 0x4>; > + reg-names = "rev", "sysc"; > + ti,sysc-midle = <SYSC_IDLE_FORCE>, > + <SYSC_IDLE_NO>, > + <SYSC_IDLE_SMART>; > + ti,sysc-sidle = <SYSC_IDLE_FORCE>, > + <SYSC_IDLE_NO>, > + <SYSC_IDLE_SMART>; > + clocks = <&gpu_clkctrl OMAP5_GPU_CLKCTRL 0>; > + clock-names = "fck"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x56000000 0x2000000>; > + > + /* > + * Closed source PowerVR driver, no child device > + * binding or driver in mainline > + */ > + }; > + > dss: dss@58000000 { > compatible = "ti,omap5-dss"; > reg = <0x58000000 0x80>; > diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi > --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi > +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi > @@ -1146,6 +1146,20 @@ > }; > }; > > + gpu_cm: clock-controller@1500 { > + compatible = "ti,omap4-cm"; > + reg = <0x1500 0x100>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x1500 0x100>; > + > + gpu_clkctrl: clk@20 { > + compatible = "ti,clkctrl"; > + reg = <0x20 0x4>; > + #clock-cells = <2>; > + }; > + }; > + > l3init_cm: l3init_cm@1600 { > compatible = "ti,omap4-cm"; > reg = <0x1600 0x100>; > -- > 2.23.0
