Based on Tony Lindgren's work for omap34xx, this patch applies the same
functionality to the AM3517.
The following can be tested via sysfs with the following to ensure the SGX
module gets enabled and disabled properly:
0x00010201
Bus error
Note that this patch depends on the PRM rstctrl driver that has
been recently posted. If the child device driver(s) need to prevent
rstctrl reset on PM runtime suspend, the drivers need to increase
the usecount for the shared rstctrl reset that can be mapped also
for the child device(s) or accessed via dev->parent.
Cc: Filip Matijević <filip.matijevic.pz@xxxxxxxxx>
Cc: "H. Nikolaus Schaller" <hns@xxxxxxxxxxxxx>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@xxxxxxxxx>
Cc: moaz korena <moaz@xxxxxxxxxx>
Cc: Merlijn Wajer <merlijn@xxxxxxxxxx>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@xxxxxxxxx>
Cc: Philipp Rossak <embed3d@xxxxxxxxx>
Cc: Tomi Valkeinen <tomi.valkeinen@xxxxxx>
Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 23ea381d363f..bf3002009b00 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -88,6 +88,30 @@
interrupts = <24>;
clocks = <&hecc_ck>;
};
+
+ /*
+ * On am3517 the OCP registers do not seem to be accessible
+ * similar to the omap34xx. Maybe SGX is permanently set to
+ * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is
+ * write-only at 0x50000e10. We detect SGX based on the SGX
+ * revision register instead of the unreadable OCP revision
+ * register.
+ */
+ sgx_module: target-module@50000000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x50000014 0x4>;
+ reg-names = "rev";
+ clocks = <&sgx_fck>, <&sgx_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x50000000 0x4000>;
+
+ /*
+ * Closed source PowerVR driver, no child device
+ * binding or driver in mainline
+ */
+ };
};
};
--
2.17.1
