On Fri, 18 Jan 2019 12:01:43 -0800
Tony Lindgren <tony@xxxxxxxxxxx> wrote:
> * Tony Lindgren <tony@xxxxxxxxxxx> [190117 14:28]:
> > * H. Nikolaus Schaller <hns@xxxxxxxxxxxxx> [190117 11:07]:
> > > This seems to break dmtimer/pwm mode for timer9 which
> > > we use for driving display backlight while timer8
> > > for keyboard backlight still works.
> >
> > Oops sorry about that.
> >
> > > Is there an upcoming patch not yet merged in 5.0-rc2 or
> > > what makes the difference in 5.0 between timer8 and timer9?
> >
> > I need to look. Sounds like there might be some optional clock
> > missing in the dts. I'll take a look.
> >
> > > PS: the symptom is that we don't even see a /sys/class/backlight
> > > node for the display backlight [2].
>
> Adding Tero and linux-omap to Cc.
>
> Nikolaus, care to try the below patch with also timer9 configured
> in your board specific dts file depending what the timer source
> clock should be:
>
> &timer9 {
> assigned-clocks = <&l4_per_clkctrl OMAP5_TIMER9_CLKCTRL 24>;
> assigned-clock-parents = <&sys_clkin>;
> };
>
diff --git a/arch/arm/boot/dts/pyra-display.dtsi b/arch/arm/boot/dts/pyra-display.dtsi
index b219b2961020..9fc793785b89 100644
--- a/arch/arm/boot/dts/pyra-display.dtsi
+++ b/arch/arm/boot/dts/pyra-display.dtsi
@@ -249,6 +249,11 @@
/* set to e.g. 8300 if display uses a TPS6116x instead of TPS61040 (which is limited to 500 Hz PWM) */
#define BACKLIGHT_FREQ_HZ 83
+&timer9 {
+ assigned-clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>;
+ assigned-clock-parents = <&sys_clkin>;
+};
+
/ {
backlight: backlight {
compatible = "pwm-backlight";
together with the patch sheds light literally on this issue.
> If that works you might as well configure it for timer8 too
> for future :)
>
> Earlier we had TIMER9_CLKCTRL bit 0 have TIMER9_CLKCTRL bit 24
> as it's parent. But I think we actually have bit 0 as the module
> clock and bit 24 as the timer functional clock. So bit 24 is not
> a parent of bit 0.
>
> Tero can you check the above assumption?
>
> If that's not the case then we need more patching..
>
> Regards,
>
> Tony
>
> 8< ----------------
> diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c
> --- a/drivers/clocksource/timer-ti-dm.c
> +++ b/drivers/clocksource/timer-ti-dm.c
> @@ -154,6 +154,10 @@ static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer)
> if (IS_ERR(parent))
> return -ENODEV;
>
> + /* Bail out if both clocks point to fck */
> + if (clk_is_match(parent, timer->fclk))
> + return 0;
> +
> ret = clk_set_parent(timer->fclk, parent);
> if (ret < 0)
> pr_err("%s: failed to set parent\n", __func__);
>
Regards,
Andreas
PS nit: why we have l4_per_clkctrl on omap4 and l4per_clkctrl on omap5?
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