* Ladislav Michl <ladis@xxxxxxxxxxxxxx> [171111 21:31]:
> Enable use of R/B pin. This is just experimental placeholder patch
> as it lacks pinmux settings.
>
> Signed-off-by: Ladislav Michl <ladis@xxxxxxxxxxxxxx>
> ---
> Changes:
> -v4: new patch
>
> arch/arm/boot/dts/omap2420-n8x0-common.dtsi | 4 +---
> arch/arm/boot/dts/omap3-n900.dts | 1 +
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
> index 843f6a2f5e29..cfe5d02ea0ed 100644
> --- a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
> +++ b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
> @@ -42,14 +42,12 @@
>
> &gpmc {
> ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
> -
> - /* gpio-irq for dma: 26 */
> -
> onenand@0,0 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "ti,omap2-onenand";
> reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
> + rb-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
>
> gpmc,sync-read;
> gpmc,burst-length = <16>;
This should be then <&gpio1 26 GPIO_ACTIVE_HIGH>, there is no &gpio0. This
will produce a build error too.
> diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
> index aa5b1a439564..718116d9f4ac 100644
> --- a/arch/arm/boot/dts/omap3-n900.dts
> +++ b/arch/arm/boot/dts/omap3-n900.dts
> @@ -840,6 +840,7 @@
> #size-cells = <1>;
> compatible = "ti,omap2-onenand";
> reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
> + rb-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
>
> gpmc,sync-read;
> gpmc,sync-write;
This worked for me on n900, I'm currently unable to test n8x0.
But might be worth double checking if &gpio3 is correct here?
Regards,
Tony
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