Re: n900 in next-20170901

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On 14/11/17 21:44, Tony Lindgren wrote:
* Tero Kristo <t-kristo@xxxxxx> [171114 19:34]:
I guess you could just use rx51_secure_dispatcher and ditch the
save_secure_ram_context call completely (and most of the other related
code)? That one would handle the cache also in a clean manner.

Something like:

rx51_secure_dispatcher(25, 0, FLAG_START_CRITICAL, 4,
__pa(omap3_secure_ram_storage), 0, 1, 1);

That's different, as rx51_secure_dispatcher does the following:

- Use arguments + 1 instead of 4, we currently use just 4
- Disables local_irq and fiq, we are not doing that now
- Flushes and invalidates cache range, we are not doing that
- Calls omap_smc3 that only does mov r6, #0xff, and does not
   do mov r2, #4
- Missing nops after it's done

This just based on a quick look I did earlier. So just
because of the extra work it does we don't want to do it
even if it worked :)

Hmm ok, I was just thinking that all the extra flushes, irq disables etc. might be good to have in place, as a safeguard when entering secure mode. You might get glitches in certain conditions otherwise.

The things it is missing might just be clutter.

Anyway, that said, the changes you did look sane, but I might have cleaned it up a bit further. :)

-Tero

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