On 12/02, Keerthy wrote: > Currently the divider selection logic blindly divides the parent_rate > by the clk rate and gives the divider value for the divider clocks > which do not have the CLK_SET_RATE_PARENT flag set. Add the clk divider > table parsing to get the closest divider available in the table > provided via Device tree. > > The code is pretty much taken from: drivers/clk/clk-divider.c. > and used here to fix up the best divider selection logic. > > Signed-off-by: Keerthy <j-keerthy@xxxxxx> > Reported-by: Richard Woodruff <r-woodruff2@xxxxxx> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
