Has anyone done much extensive testing with the TWL4030-RTC lately? My device tree (logicpd-torpedo-37xx-devkit) has the I2C clock frequency set to 2600000 which matches what most of the other boards have for this. What's interesting is that I am seeing some issues reading the RTC from the PMIC and at times, failures writing to it. I am testing on the 4.4.y kernel, and comparing the responses to the 3.0 kernel. Unfortunately, I don't have a good way to examining the clock lines, but it's on my to-do list. Since the 3.0 kernel that i have seems to work fine and the 4.4.y had some issues, I thought it might be software related. I then compared it against the 4.9-RC series and whatever is ailing my I2C bus seems to be worse on the 4.9 branch than the 4.4. I slowed down the I2C bus in the device tree and it seems to work around the issue, but I thought I'd ask if anyone else has seen anything similar. I have put the twl4030-rtc into the kernel instead of compiling a module. From what I can tell, it seems to be limited to the rtc portion of the PMIC. I do not get errors when the processor chances the voltage settings. I have measured the various regulator outputs and they appear to be correct. The error I get is as follows: [ 3.075317] twl_rtc 48070000.i2c:twl@48:rtc: Enabling TWL-RTC [ 3.086914] twl_rtc 48070000.i2c:twl@48:rtc: rtc core: registered 48070000.i2c:twl@48 as rtc0 [ 3.841400] twl_rtc 48070000.i2c:twl@48:rtc: hctosys: unable to read the hardware clock There is almost 800 miliseconds between when it's registered and the attempt to read. Thanks for any comments or feedback. adam -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
