Hi there,
some IGEPv2 boards comes either with NAND or OneNAND flash memory and I'd
like to support that with single kernel and fdt blob. As U-Boot can
already detect flash type used I thought that having both onenand@0,0
and nand@0,0 nodes in FDT would be easiest method. Bootloader could then
set status="disabled" property on memory not detected.
However a few problems stands in the way of doing this:
- gpmc's ranges documentation states: "Currently, calculated values
derived from the contents of the per-CS register GPMC_CONFIG7 (as set
up by the bootloader) are used for the physical address decoding.
As this will change in the future, filling correct values here is
a requirement."
But I'd end with filling something like this:
ranges = <0 0 0x20000000 0x08000000>, /* CS0: 128MB for OneNAND */
<0 0 0x30000000 0x08000000>, /* CS0: 16MB for NAND */
<5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
Which seems unlikely to work. What are the other options? Map both
chips to the same space? That would require change in bootloader as
mapping is taken from there currently.
- OneNAND DT child is probed differently, cs is not remapped and timings are
calculated in the code, however there are some snippets in kernel DTS' that
includes OneNAND specific timings. These are for future use?
Also, is there datasheet for OneNAND chip used in IGEPv2 available? Tried
to search for parts mentioned in igep-x-loader source and found nothing
interesting. Otherwise I could recompute register values written by
igep-x-loader to config registers to get timing, but I'd prefer to verify
them against datasheet.
Currently omap-onenand driver fails to probe chip, but as it was probably
never tested with mainline kernel, I need to get GPMC setup right first
(or skip it and rely on botloader).
Btw, is there a way to runtime distinguish between IGEPv2 and IGEP COM
in bootloader?
Thank you,
ladis
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