Re: [PATCH v2 2/3] ARM: DRA7x: dts: Update the OSC_32K_CLK frequency

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On 02/05/16 20:12, J.D. Schroeder wrote:
From: "J.D. Schroeder" <jay.schroeder@xxxxxxxxxx>

This commit updates the OSC_32K_CLK (secure_32k_clk_src_ck) frequency
from the precise 32kHz frequency (i.e., 32.768 kHz) to a more
accurate frequency of ~34.6 kHz. Actual measured frequencies of the
clock vary from processor to processor anywhere from 34.4 kHz up to
34.8 kHz. Note that the ~34 kHz frequency clock is generated
internally by the processor, not an input to the processor. This
change makes it more clear that the consumer of the
secure_32k_clk_src_ck will not get a precise 32.768 kHz frequency
output.

Signed-off-by: J.D. Schroeder <jay.schroeder@xxxxxxxxxx>
Reviewed-by: Trenton Andres <trenton.andres@xxxxxxxxxx>
---
  arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 3f0c61d..f7ec976 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -95,7 +95,7 @@
  	secure_32k_clk_src_ck: secure_32k_clk_src_ck {
  		#clock-cells = <0>;
  		compatible = "fixed-clock";
-		clock-frequency = <32768>;
+		clock-frequency = <34600>; /* approximate frequency */
  	};

  	sys_clk32_crystal_ck: sys_clk32_crystal_ck {


I still don't agree with this patch. The actual frequency can drift much more, you are just seeing this number at your setup. There is some internal discussion going on in TI about this, but I can't share any data on this yet.

-Tero
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