* Dave Gerlach <d-gerlach@xxxxxx> [160412 08:45]:
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -268,7 +268,6 @@ void omap_sram_idle(void)
> int per_next_state = PWRDM_POWER_ON;
> int core_next_state = PWRDM_POWER_ON;
> int per_going_off;
> - int core_prev_state;
> u32 sdrc_pwr = 0;
>
> mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
> @@ -348,17 +347,21 @@ void omap_sram_idle(void)
> sdrc_write_reg(sdrc_pwr, SDRC_POWER);
>
> /* CORE */
> - if (core_next_state < PWRDM_POWER_ON) {
> - core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
> - if (core_prev_state == PWRDM_POWER_OFF) {
> - omap3_core_restore_context();
> - omap3_cm_restore_context();
> - omap3_push_sram_idle();
> - omap3_push_sram_secure_idle();
> - omap2_sms_restore_context();
> - }
> + if (core_next_state < PWRDM_POWER_ON &&
> + pwrdm_read_prev_pwrst(core_pwrdm) == PWRDM_POWER_OFF) {
> + omap3_core_restore_context();
> + omap3_cm_restore_context();
> + omap3_push_sram_idle();
> + omap3_push_sram_secure_idle();
> + omap2_sms_restore_context();
> + } else {
> + /*
> + * In off-mode resume path above, omap3_core_restore_context
> + * also handles the INTC autoidle restore done here so limit
> + * this to non-off mode resume paths so we don't do it twice.
> + */
> + omap3_intc_resume_idle();
> }
> - omap3_intc_resume_idle();
>
> pwrdm_post_transition(NULL);
Can you please repost against v4.7-rc? This does not apply as
mainline still uses omap3_sram_restore_context(). Should be
retested again with your patches applied on top of this fix.
Regards,
Tony
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