On 20/07/15 15:08, Tero Kristo wrote: > On 07/17/2015 04:47 PM, Roger Quadros wrote: >> This register is required to be passed to the SATA PHY driver >> to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock). >> >> Signed-off-by: Roger Quadros <rogerq@xxxxxx> >> --- >> arch/arm/boot/dts/dra7.dtsi | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi >> index 8f1e25b..4a0718c 100644 >> --- a/arch/arm/boot/dts/dra7.dtsi >> +++ b/arch/arm/boot/dts/dra7.dtsi >> @@ -1140,6 +1140,7 @@ >> ctrl-module = <&omap_control_sata>; >> clocks = <&sys_clkin1>, <&sata_ref_clk>; >> clock-names = "sysclk", "refclk"; >> + syscon-pllreset = <&scm_conf 0x3fc>; >> #phy-cells = <0>; >> }; >> >> > > Looks fine to me. > > Make sure you use this register via regmap_update_bits only, seeing there is another potential user for the same register. Yes. Patch 1 is the user using regmap_update_bits. cheers, -roger -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
