[PATCH 0/2] DRA7 DSP MMU config support

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Hi,

This series adds the basic support in the OMAP IOMMU driver to
enable/disable DSP IOMMUs for the DRA7xx family of SoCs. The
DRA7 family has two MMUs within the DSP processor subsystems.
This is the first time this was designed so in the silicon
compared to the equivalent ones on OMAP2+ SoCs.

Each MMU requires a specific bit to be turned on within a register
from a separate sub-module DSP_SYSTEM present within the respective
processor subsystem. The DSP_SYSTEM sub-module is represented as a
syscon node, and an additional property "ti,syscon-mmuconfig" is
used alongside a unique compatible property for configuring these
devices. The register and bit offset is coded up in the driver
while the DT property references the syscon phandle the MMU instance
number.

The binding support could have been done in couple of other ways,
like using separate compatible each for the DSP processor MMU &
the DSP EDMA MMU that automatically identifies the instance number;
and/or coding up the register offset & bit position/offset in
the syscon property, so let me know if the current approach is
fine.

The patches are baselined on 4.2-rc3 + the recent OMAP IOMMU
cleanup series [1]. I will post the DTS patches separately to
allow Tony to pick them up independently.

regards
Suman

[1] http://lists.linuxfoundation.org/pipermail/iommu/2015-July/013659.html

Suman Anna (2):
  Documentation: dt: Update OMAP iommu bindings for DRA7 DSPs
  iommu/omap: Add support for configuring dsp iommus on DRA7xx

 .../devicetree/bindings/iommu/ti,omap-iommu.txt    | 27 ++++++++++
 drivers/iommu/omap-iommu.c                         | 58 ++++++++++++++++++++++
 drivers/iommu/omap-iommu.h                         |  9 ++++
 3 files changed, 94 insertions(+)

-- 
2.4.4

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