The last register address is offset at 0x2d0 but is a
4 bit register. So total GPMC register resource size
is 0x2d4
Signed-off-by: Roger Quadros <rogerq@xxxxxx>
---
arch/arm/boot/dts/omap3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 69a40cf..f9623f7 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -714,7 +714,7 @@
gpmc: gpmc@6e000000 {
compatible = "ti,omap3430-gpmc";
ti,hwmods = "gpmc";
- reg = <0x6e000000 0x02d0>;
+ reg = <0x6e000000 0x02d4>;
interrupts = <20>;
gpmc,num-cs = <8>;
gpmc,num-waitpins = <4>;
--
2.1.4
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